1/* $NetBSD: dwc_mmc_reg.h,v 1.11 2022/01/09 15:03:43 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2014-2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef _DWC_MMC_REG_H
30#define _DWC_MMC_REG_H
31
32#define DWC_MMC_GCTRL			0x0000
33#define DWC_MMC_PWREN			0x0004
34#define	DWC_MMC_CLKDIV			0x0008
35#define	DWC_MMC_CLKSRC			0x000c
36#define	DWC_MMC_CLKENA			0x0010
37#define DWC_MMC_TIMEOUT			0x0014
38#define DWC_MMC_WIDTH			0x0018
39#define DWC_MMC_BLKSZ			0x001c
40#define DWC_MMC_BYTECNT			0x0020
41#define DWC_MMC_IMASK			0x0024
42#define DWC_MMC_ARG			0x0028
43#define DWC_MMC_CMD			0x002c
44#define DWC_MMC_RESP0			0x0030
45#define DWC_MMC_RESP1			0x0034
46#define DWC_MMC_RESP2			0x0038
47#define DWC_MMC_RESP3			0x003c
48#define DWC_MMC_MINT			0x0040
49#define DWC_MMC_RINT			0x0044
50#define DWC_MMC_STATUS			0x0048
51#define DWC_MMC_FIFOTH			0x004c
52#define	DWC_MMC_CDETECT			0x0050
53#define	DWC_MMC_WRITEPROT		0x0054
54#define	DWC_MMC_GPIO			0x0058
55#define DWC_MMC_CBCR			0x005c
56#define DWC_MMC_BBCR			0x0060
57#define	DWC_MMC_DEBNCE			0x0064
58#define	DWC_MMC_USRID			0x0068
59#define	DWC_MMC_VERID			0x006c
60#define	DWC_MMC_HCON			0x0070
61#define	DWC_MMC_UHS			0x0074
62#define	DWC_MMC_RST			0x0078
63#define DWC_MMC_DMAC			0x0080
64#define	DWC_MMC_PLDMND			0x0084
65#define DWC_MMC_DLBA			0x0088
66#define DWC_MMC_IDST			0x008c
67#define DWC_MMC_IDIE			0x0090
68#define DWC_MMC_DSCADDR			0x0094
69#define DWC_MMC_BUFADDR			0x0098
70#define DWC_MMC_CARDTHRCTL		0x0100
71
72#define DWC_MMC_GCTRL_USE_INTERNAL_DMAC	__BIT(25)
73#define DWC_MMC_GCTRL_SEND_AUTO_STOP_CCSD __BIT(10)
74#define DWC_MMC_GCTRL_DMAEN		__BIT(5)
75#define DWC_MMC_GCTRL_INTEN		__BIT(4)
76#define DWC_MMC_GCTRL_DMARESET		__BIT(2)
77#define DWC_MMC_GCTRL_FIFORESET		__BIT(1)
78#define DWC_MMC_GCTRL_SOFTRESET		__BIT(0)
79#define DWC_MMC_GCTRL_RESET \
80	(DWC_MMC_GCTRL_SOFTRESET | DWC_MMC_GCTRL_FIFORESET | \
81	 DWC_MMC_GCTRL_DMARESET)
82
83#define DWC_MMC_CLKENA_LOWPOWERON	__BIT(16)
84#define DWC_MMC_CLKENA_CARDCLKON	__BIT(0)
85
86#define DWC_MMC_WIDTH_1		0x00000000
87#define DWC_MMC_WIDTH_4		0x00000001
88#define DWC_MMC_WIDTH_8		0x00010000
89
90#define DWC_MMC_CMD_START		__BIT(31)
91#define DWC_MMC_CMD_USE_HOLD_REG	__BIT(29)
92#define DWC_MMC_CMD_VOL_SWITCH		__BIT(28)
93#define DWC_MMC_CMD_BOOT_MODE		__BIT(27)
94#define DWC_MMC_CMD_DISABLE_BOOT	__BIT(26)
95#define DWC_MMC_CMD_EXPECT_BOOT_ACT	__BIT(25)
96#define DWC_MMC_CMD_ENABLE_BOOT		__BIT(24)
97#define DWC_MMC_CMD_UPCLK_ONLY		__BIT(21)
98#define DWC_MMC_CMD_SEND_INIT_SEQ	__BIT(15)
99#define DWC_MMC_CMD_STOP_ABORT_CMD	__BIT(14)
100#define DWC_MMC_CMD_WAIT_PRE_OVER	__BIT(13)
101#define DWC_MMC_CMD_SEND_AUTO_STOP	__BIT(12)
102#define DWC_MMC_CMD_SEQMOD		__BIT(11)
103#define DWC_MMC_CMD_WRITE		__BIT(10)
104#define DWC_MMC_CMD_DATA_EXP		__BIT(9)
105#define DWC_MMC_CMD_CHECK_RSP_CRC	__BIT(8)
106#define DWC_MMC_CMD_LONG_RSP		__BIT(7)
107#define DWC_MMC_CMD_RSP_EXP		__BIT(6)
108
109#define DWC_MMC_INT_CARD_REMOVE		__BIT(31)
110#define DWC_MMC_INT_CARD_INSERT		__BIT(30)
111#define DWC_MMC_INT_SDIO_INT(n)		__BIT(16 + (n))
112#define DWC_MMC_INT_END_BIT_ERR		__BIT(15)
113#define DWC_MMC_INT_AUTO_CMD_DONE	__BIT(14)
114#define DWC_MMC_INT_START_BIT_ERR	__BIT(13)
115#define DWC_MMC_INT_HW_LOCKED		__BIT(12)
116#define DWC_MMC_INT_FIFO_RUN_ERR	__BIT(11)
117#define DWC_MMC_INT_VOL_CHG_DONE	__BIT(10)
118#define DWC_MMC_INT_DATA_STARVE		__BIT(10)
119#define DWC_MMC_INT_BOOT_START		__BIT(9)
120#define DWC_MMC_INT_DATA_TIMEOUT	__BIT(9)
121#define DWC_MMC_INT_ACK_RCV		__BIT(8)
122#define DWC_MMC_INT_RESP_TIMEOUT	__BIT(8)
123#define DWC_MMC_INT_DATA_CRC_ERR	__BIT(7)
124#define DWC_MMC_INT_RESP_CRC_ERR	__BIT(6)
125#define DWC_MMC_INT_RX_DATA_REQ		__BIT(5)
126#define DWC_MMC_INT_TX_DATA_REQ		__BIT(4)
127#define DWC_MMC_INT_DATA_OVER		__BIT(3)
128#define DWC_MMC_INT_CMD_DONE		__BIT(2)
129#define DWC_MMC_INT_RESP_ERR		__BIT(1)
130#define DWC_MMC_INT_ERROR \
131	(DWC_MMC_INT_RESP_ERR | DWC_MMC_INT_RESP_CRC_ERR | \
132	 DWC_MMC_INT_DATA_CRC_ERR | DWC_MMC_INT_RESP_TIMEOUT | \
133	 DWC_MMC_INT_FIFO_RUN_ERR | DWC_MMC_INT_HW_LOCKED | \
134	 DWC_MMC_INT_START_BIT_ERR  | DWC_MMC_INT_END_BIT_ERR)
135
136#define DWC_MMC_STATUS_DMAREQ		__BIT(31)
137#define DWC_MMC_STATUS_DATA_FSM_BUSY	__BIT(10)
138#define DWC_MMC_STATUS_CARD_DATA_BUSY	__BIT(9)
139#define DWC_MMC_STATUS_CARD_PRESENT	__BIT(8)
140#define DWC_MMC_STATUS_FIFO_FULL	__BIT(3)
141#define DWC_MMC_STATUS_FIFO_EMPTY	__BIT(2)
142#define DWC_MMC_STATUS_TXWL_FLAG	__BIT(1)
143#define DWC_MMC_STATUS_RXWL_FLAG	__BIT(0)
144
145#define	DWC_MMC_FIFOTH_DMA_MULTIPLE_TXN_SIZE __BITS(30,28)
146#define	DWC_MMC_FIFOTH_DMA_MULTIPLE_TXN_SIZE_16	3
147#define	DWC_MMC_FIFOTH_RX_WMARK		__BITS(27,16)
148#define	DWC_MMC_FIFOTH_TX_WMARK		__BITS(11,0)
149
150#define	DWC_MMC_CDETECT_CARD_DETECT_N	__BIT(0)
151
152#define DWC_MMC_DMAC_IDMA_ON		__BIT(7)
153#define DWC_MMC_DMAC_FIX_BURST		__BIT(1)
154#define DWC_MMC_DMAC_SOFTRESET		__BIT(0)
155
156#define DWC_MMC_VERID_ID		__BITS(15,0)
157#define DWC_MMC_VERID_240A		0x240a
158#define DWC_MMC_VERID_280A		0x280a
159
160#define DWC_MMC_IDST_HOST_ABT		__BIT(10)
161#define DWC_MMC_IDST_ABNORMAL_INT_SUM	__BIT(9)
162#define DWC_MMC_IDST_NORMAL_INT_SUM	__BIT(8)
163#define DWC_MMC_IDST_CARD_ERR_SUM	__BIT(5)
164#define DWC_MMC_IDST_DES_INVALID	__BIT(4)
165#define DWC_MMC_IDST_FATAL_BUS_ERR	__BIT(2)
166#define DWC_MMC_IDST_RECEIVE_INT	__BIT(1)
167#define DWC_MMC_IDST_TRANSMIT_INT	__BIT(0)
168#define DWC_MMC_IDST_ERROR \
169	(DWC_MMC_IDST_ABNORMAL_INT_SUM | DWC_MMC_IDST_CARD_ERR_SUM | \
170	 DWC_MMC_IDST_DES_INVALID | DWC_MMC_IDST_FATAL_BUS_ERR)
171#define DWC_MMC_IDST_COMPLETE \
172	(DWC_MMC_IDST_RECEIVE_INT | DWC_MMC_IDST_TRANSMIT_INT)
173
174#define DWC_MMC_CARDTHRCTL_RDTHR	__BITS(27,16)
175#define DWC_MMC_CARDTHRCTL_RDTHREN	__BIT(0)
176
177struct dwc_mmc_idma_desc {
178	uint32_t		dma_config;
179#define DWC_MMC_IDMA_CONFIG_DIC		__BIT(1)
180#define DWC_MMC_IDMA_CONFIG_LD		__BIT(2)
181#define DWC_MMC_IDMA_CONFIG_FD		__BIT(3)
182#define DWC_MMC_IDMA_CONFIG_CH		__BIT(4)
183#define DWC_MMC_IDMA_CONFIG_ER		__BIT(5)
184#define DWC_MMC_IDMA_CONFIG_CES		__BIT(30)
185#define DWC_MMC_IDMA_CONFIG_OWN		__BIT(31)
186	uint32_t		dma_buf_size;
187	uint32_t		dma_buf_addr;
188	uint32_t		dma_next;
189} __packed;
190
191#endif /* !_DWC_MMC_REG_H */
192