twl4030.c revision 1.1 
1/* $NetBSD: twl4030.c,v 1.1 2019/10/30 21:38:28 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: twl4030.c,v 1.1 2019/10/30 21:38:28 jmcneill Exp $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/device.h>
36#include <sys/conf.h>
37#include <sys/bus.h>
38#include <sys/kmem.h>
39#include <sys/gpio.h>
40
41#include <dev/i2c/i2cvar.h>
42
43#include <dev/fdt/fdtvar.h>
44
45#define	TWL_PIN_COUNT	16
46
47/* TWL4030 is a multi-function IC. Each module is at a separate I2C address */
48#define	ADDR_USB	0x00
49#define	ADDR_INT	0x01
50#define	ADDR_AUX	0x02
51#define	ADDR_POWER	0x03
52
53/* GPIO registers */
54#define	GPIOBASE		0x98
55#define	GPIODATAIN(pin)		(GPIOBASE + 0x00 + (pin) / 8)
56#define	GPIODATADIR(pin)	(GPIOBASE + 0x03 + (pin) / 8)
57#define	CLEARGPIODATAOUT(pin)	(GPIOBASE + 0x09 + (pin) / 8)
58#define	SETGPIODATAOUT(pin)	(GPIOBASE + 0x0c + (pin) / 8)
59#define	 PIN_BIT(pin)		__BIT((pin) % 8)
60#define	GPIOPUPDCTR(pin)	(GPIOBASE + 0x13 + (n) / 4)
61#define	 PUPD_BITS(pin)		__BITS((pin) % 4 + 1, (pin) % 4)
62
63struct twl_softc {
64	device_t	sc_dev;
65	i2c_tag_t	sc_i2c;
66	i2c_addr_t	sc_addr;
67	int		sc_phandle;
68
69	int		sc_npins;
70};
71
72struct twl_pin {
73	struct twl_softc	*pin_sc;
74	int			pin_num;
75	int			pin_flags;
76	bool			pin_actlo;
77};
78
79static const struct device_compatible_entry compat_data[] = {
80	{ "ti,twl4030",			0 },
81	{ NULL,				0 }
82};
83
84static const char * const gpio_compatible[] = { "ti,twl4030-gpio", NULL };
85
86static uint8_t
87twl_read(struct twl_softc *sc, uint8_t mod, uint8_t reg, int flags)
88{
89	uint8_t val = 0;
90	int error;
91
92	error = iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr + mod,
93	    &reg, 1, &val, 1, flags);
94	if (error != 0)
95		aprint_error_dev(sc->sc_dev, "error reading reg %#x: %d\n", reg, error);
96
97	return val;
98}
99
100static void
101twl_write(struct twl_softc *sc, uint8_t mod, uint8_t reg, uint8_t val, int flags)
102{
103	uint8_t buf[2];
104	int error;
105
106	buf[0] = reg;
107	buf[1] = val;
108
109	error = iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr + mod,
110	    NULL, 0, buf, 2, flags);
111	if (error != 0)
112		aprint_error_dev(sc->sc_dev, "error writing reg %#x: %d\n", reg, error);
113}
114
115#define	I2C_LOCK(sc)		iic_acquire_bus((sc)->sc_i2c, I2C_F_POLL)
116#define	I2C_UNLOCK(sc)		iic_release_bus((sc)->sc_i2c, I2C_F_POLL)
117
118#define	INT_READ(sc, reg)	twl_read((sc), ADDR_INT, (reg), I2C_F_POLL)
119#define	INT_WRITE(sc, reg, val)	twl_write((sc), ADDR_INT, (reg), (val), I2C_F_POLL)
120
121static int
122twl_gpio_config(struct twl_softc *sc, int pin, int flags)
123{
124	uint8_t dir;
125
126	KASSERT(pin >= 0 && pin < sc->sc_npins);
127
128	dir = INT_READ(sc, GPIODATADIR(pin));
129
130	switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
131	case GPIO_PIN_INPUT:
132		dir &= ~PIN_BIT(pin);
133		break;
134	case GPIO_PIN_OUTPUT:
135		dir |= PIN_BIT(pin);
136		break;
137	default:
138		return EINVAL;
139	}
140
141	INT_WRITE(sc, GPIODATADIR(pin), dir);
142
143	return 0;
144}
145
146static void *
147twl_gpio_acquire(device_t dev, const void *data, size_t len, int flags)
148{
149	struct twl_softc * const sc = device_private(dev);
150	struct twl_pin *gpin;
151	const u_int *gpio = data;
152	int error;
153
154	if (len != 12)
155		return NULL;
156
157	const uint8_t pin = be32toh(gpio[1]) & 0xff;
158	const bool actlo = (be32toh(gpio[2]) & __BIT(0)) != 0;
159
160	if (pin >= sc->sc_npins)
161		return NULL;
162
163	I2C_LOCK(sc);
164	error = twl_gpio_config(sc, pin, flags);
165	I2C_UNLOCK(sc);
166
167	if (error != 0) {
168		device_printf(dev, "bad pin %d config %#x\n", pin, flags);
169		return NULL;
170	}
171
172	gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
173	gpin->pin_sc = sc;
174	gpin->pin_num = pin;
175	gpin->pin_flags = flags;
176	gpin->pin_actlo = actlo;
177
178	return gpin;
179}
180
181static void
182twl_gpio_release(device_t dev, void *priv)
183{
184	struct twl_softc * const sc = device_private(dev);
185	struct twl_pin *gpin = priv;
186
187	I2C_LOCK(sc);
188	twl_gpio_config(sc, gpin->pin_num, GPIO_PIN_INPUT);
189	I2C_UNLOCK(sc);
190
191	kmem_free(gpin, sizeof(*gpin));
192}
193
194static int
195twl_gpio_read(device_t dev, void *priv, bool raw)
196{
197	struct twl_softc * const sc = device_private(dev);
198	struct twl_pin *gpin = priv;
199	uint8_t gpio;
200	int val;
201
202	I2C_LOCK(sc);
203	gpio = INT_READ(sc, GPIODATAIN(gpin->pin_num));
204	I2C_UNLOCK(sc);
205
206	val = __SHIFTOUT(gpio, PIN_BIT(gpin->pin_num));
207	if (!raw && gpin->pin_actlo)
208		val = !val;
209
210	return val;
211}
212
213static void
214twl_gpio_write(device_t dev, void *priv, int val, bool raw)
215{
216	struct twl_softc * const sc = device_private(dev);
217	struct twl_pin *gpin = priv;
218
219	if (!raw && gpin->pin_actlo)
220		val = !val;
221
222	I2C_LOCK(sc);
223	if (val)
224		INT_WRITE(sc, SETGPIODATAOUT(gpin->pin_num), PIN_BIT(gpin->pin_num));
225	else
226		INT_WRITE(sc, CLEARGPIODATAOUT(gpin->pin_num), PIN_BIT(gpin->pin_num));
227	I2C_UNLOCK(sc);
228}
229
230static struct fdtbus_gpio_controller_func twl_gpio_funcs = {
231	.acquire = twl_gpio_acquire,
232	.release = twl_gpio_release,
233	.read = twl_gpio_read,
234	.write = twl_gpio_write,
235};
236
237static void
238twl_gpio_attach(struct twl_softc *sc, const int phandle)
239{
240	fdtbus_register_gpio_controller(sc->sc_dev, phandle, &twl_gpio_funcs);
241}
242
243static int
244twl_match(device_t parent, cfdata_t match, void *aux)
245{
246	struct i2c_attach_args *ia = aux;
247	int match_result;
248
249	if (iic_use_direct_match(ia, match, compat_data, &match_result))
250		return match_result;
251
252	return 0;
253}
254
255static void
256twl_attach(device_t parent, device_t self, void *aux)
257{
258	struct twl_softc * const sc = device_private(self);
259	struct i2c_attach_args *ia = aux;
260	int child;
261
262	sc->sc_dev = self;
263	sc->sc_i2c = ia->ia_tag;
264	sc->sc_addr = ia->ia_addr;
265	sc->sc_phandle = ia->ia_cookie;
266	sc->sc_npins = TWL_PIN_COUNT;
267
268	aprint_naive("\n");
269	aprint_normal(": TWL4030");
270
271	for (child = OF_child(sc->sc_phandle); child; child = OF_peer(child)) {
272		if (of_match_compatible(child, gpio_compatible)) {
273			aprint_normal(", GPIO");
274			twl_gpio_attach(sc, child);
275		}
276	}
277	aprint_normal("\n");
278}
279
280CFATTACH_DECL_NEW(twl, sizeof(struct twl_softc),
281    twl_match, twl_attach, NULL, NULL);
282