pcf8563.c revision 1.13
1/* $NetBSD: pcf8563.c,v 1.13 2021/01/17 21:42:35 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2011 Jonathan A. Kollasch 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* XXX */ 30#if defined(__arm__) || defined(__aarch64__) 31#include "opt_fdt.h" 32#endif 33 34#include <sys/cdefs.h> 35__KERNEL_RCSID(0, "$NetBSD: pcf8563.c,v 1.13 2021/01/17 21:42:35 thorpej Exp $"); 36 37#include <sys/param.h> 38#include <sys/systm.h> 39#include <sys/device.h> 40#include <sys/kernel.h> 41 42#include <dev/clock_subr.h> 43 44#include <dev/i2c/i2cvar.h> 45#include <dev/i2c/pcf8563reg.h> 46 47#ifdef FDT 48#include <dev/fdt/fdtvar.h> 49#endif 50 51static const struct device_compatible_entry compat_data[] = { 52 { .compat = "nxp,pcf8563" }, 53 { .compat = "pcf8563rtc" }, 54 55 { 0 } 56}; 57 58struct pcf8563rtc_softc { 59 device_t sc_dev; 60 i2c_tag_t sc_tag; 61 int sc_addr; 62 struct todr_chip_handle sc_todr; 63}; 64 65static int pcf8563rtc_match(device_t, cfdata_t, void *); 66static void pcf8563rtc_attach(device_t, device_t, void *); 67 68CFATTACH_DECL_NEW(pcf8563rtc, sizeof(struct pcf8563rtc_softc), 69 pcf8563rtc_match, pcf8563rtc_attach, NULL, NULL); 70 71static int pcf8563rtc_clock_read(struct pcf8563rtc_softc *, struct clock_ymdhms *); 72static int pcf8563rtc_clock_write(struct pcf8563rtc_softc *, struct clock_ymdhms *); 73static int pcf8563rtc_gettime(struct todr_chip_handle *, struct clock_ymdhms *); 74static int pcf8563rtc_settime(struct todr_chip_handle *, struct clock_ymdhms *); 75 76static int 77pcf8563rtc_match(device_t parent, cfdata_t cf, void *aux) 78{ 79 struct i2c_attach_args *ia = aux; 80 int match_result; 81 82 if (iic_use_direct_match(ia, cf, compat_data, &match_result)) 83 return match_result; 84 85 /* indirect config - check typical address */ 86 if (ia->ia_addr == PCF8563_ADDR) 87 return I2C_MATCH_ADDRESS_ONLY; 88 89 return 0; 90} 91 92static void 93pcf8563rtc_attach(device_t parent, device_t self, void *aux) 94{ 95 struct pcf8563rtc_softc *sc = device_private(self); 96 struct i2c_attach_args *ia = aux; 97 int error; 98 99 aprint_naive(": Real-time Clock\n"); 100 aprint_normal(": NXP PCF8563 Real-time Clock\n"); 101 102 sc->sc_dev = self; 103 sc->sc_tag = ia->ia_tag; 104 sc->sc_addr = ia->ia_addr; 105 sc->sc_todr.cookie = sc; 106 sc->sc_todr.todr_gettime_ymdhms = pcf8563rtc_gettime; 107 sc->sc_todr.todr_settime_ymdhms = pcf8563rtc_settime; 108 sc->sc_todr.todr_setwen = NULL; 109 110 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 111 aprint_error_dev(sc->sc_dev, 112 "failed to acquire bus for attach\n"); 113 return; 114 } 115 if ((error = iic_smbus_write_byte(sc->sc_tag, sc->sc_addr, 116 PCF8563_R_CS1, 0, 0)) == 0) { 117 error = iic_smbus_write_byte(sc->sc_tag, sc->sc_addr, 118 PCF8563_R_CS2, 0, 0); 119 } 120 iic_release_bus(sc->sc_tag, 0); 121 if (error) { 122 aprint_error_dev(sc->sc_dev, "failed to initialize RTC\n"); 123 return; 124 } 125 126#ifdef FDT 127 fdtbus_todr_attach(self, ia->ia_cookie, &sc->sc_todr); 128#else 129 todr_attach(&sc->sc_todr); 130#endif 131} 132 133static int 134pcf8563rtc_gettime(struct todr_chip_handle *ch, struct clock_ymdhms *dt) 135{ 136 struct pcf8563rtc_softc *sc = ch->cookie; 137 138 return pcf8563rtc_clock_read(sc, dt); 139} 140 141static int 142pcf8563rtc_settime(struct todr_chip_handle *ch, struct clock_ymdhms *dt) 143{ 144 struct pcf8563rtc_softc *sc = ch->cookie; 145 146 return pcf8563rtc_clock_write(sc, dt); 147} 148 149static int 150pcf8563rtc_clock_read(struct pcf8563rtc_softc *sc, struct clock_ymdhms *dt) 151{ 152 uint8_t bcd[PCF8563_NREGS]; 153 uint8_t reg = PCF8563_R_SECOND; 154 int error; 155 156 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 157 device_printf(sc->sc_dev, "acquire bus for read failed\n"); 158 return error; 159 } 160 161 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, 162 ®, 1, &bcd[reg], PCF8563_R_YEAR - reg + 1, 163 0)) != 0) { 164 iic_release_bus(sc->sc_tag, 0); 165 device_printf(sc->sc_dev, "read failed\n"); 166 return error; 167 } 168 169 iic_release_bus(sc->sc_tag, 0); 170 171 if (bcd[PCF8563_R_SECOND] & PCF8563_M_VL) 172 return EIO; 173 174 dt->dt_sec = bcdtobin(bcd[PCF8563_R_SECOND] & PCF8563_M_SECOND); 175 dt->dt_min = bcdtobin(bcd[PCF8563_R_MINUTE] & PCF8563_M_MINUTE); 176 dt->dt_hour = bcdtobin(bcd[PCF8563_R_HOUR] & PCF8563_M_HOUR); 177 dt->dt_day = bcdtobin(bcd[PCF8563_R_DAY] & PCF8563_M_DAY); 178 dt->dt_wday = bcdtobin(bcd[PCF8563_R_WEEKDAY] & PCF8563_M_WEEKDAY); 179 dt->dt_mon = bcdtobin(bcd[PCF8563_R_MONTH] & PCF8563_M_MONTH); 180 dt->dt_year = 1900 + 181 (bcdtobin(bcd[PCF8563_R_YEAR] & PCF8563_M_YEAR) % 100); 182 if ((bcd[PCF8563_R_MONTH] & PCF8563_M_CENTURY) == 0) 183 dt->dt_year += 100; 184 185 return error; 186} 187 188static int 189pcf8563rtc_clock_write(struct pcf8563rtc_softc *sc, struct clock_ymdhms *dt) 190{ 191 uint8_t bcd[PCF8563_NREGS]; 192 uint8_t reg = PCF8563_R_SECOND; 193 int error; 194 195 bcd[PCF8563_R_SECOND] = bintobcd(dt->dt_sec); 196 bcd[PCF8563_R_MINUTE] = bintobcd(dt->dt_min); 197 bcd[PCF8563_R_HOUR] = bintobcd(dt->dt_hour); 198 bcd[PCF8563_R_DAY] = bintobcd(dt->dt_day); 199 bcd[PCF8563_R_WEEKDAY] = bintobcd(dt->dt_wday); 200 bcd[PCF8563_R_MONTH] = bintobcd(dt->dt_mon); 201 bcd[PCF8563_R_YEAR] = bintobcd(dt->dt_year % 100); 202 if (dt->dt_year < 2000) 203 bcd[PCF8563_R_MONTH] |= PCF8563_M_CENTURY; 204 205 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 206 device_printf(sc->sc_dev, "acquire bus for write failed\n"); 207 return error; 208 } 209 210 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr, ®, 1, &bcd[reg], PCF8563_R_YEAR - reg + 1, 0)) != 0) { 211 iic_release_bus(sc->sc_tag, 0); 212 device_printf(sc->sc_dev, "write failed\n"); 213 return error; 214 } 215 216 iic_release_bus(sc->sc_tag, 0); 217 218 return error; 219} 220