cpu.h revision 1.6
1/* $NetBSD: cpu.h,v 1.6 1997/10/10 21:45:20 oki Exp $ */ 2 3/* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 41 * 42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 43 */ 44 45#ifndef _X68K_CPU_H_ 46#define _X68K_CPU_H_ 47 48/* 49 * Exported definitions unique to x68k/68k cpu support. 50 */ 51 52/* 53 * Get common m68k CPU definitions. 54 */ 55#include <m68k/cpu.h> 56#define M68K_MMU_MOTOROLA 57 58/* 59 * definitions of cpu-dependent requirements 60 * referenced in generic code 61 */ 62#define cpu_swapin(p) /* nothing */ 63#define cpu_wait(p) /* nothing */ 64#define cpu_swapout(p) /* nothing */ 65 66/* 67 * Arguments to hardclock and gatherstats encapsulate the previous 68 * machine state in an opaque clockframe. One the x68k, we use 69 * what the hardware pushes on an interrupt (frame format 0). 70 */ 71struct clockframe { 72 u_short sr; /* sr at time of interrupt */ 73 u_long pc; /* pc at time of interrupt */ 74 u_short vo; /* vector offset (4-word frame) */ 75}; 76 77#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) 78#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0) 79#define CLKF_PC(framep) ((framep)->pc) 80#if 0 81/* We would like to do it this way... */ 82#define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0) 83#else 84/* but until we start using PSL_M, we have to do this instead */ 85#define CLKF_INTR(framep) (0) /* XXX */ 86#endif 87 88 89/* 90 * Preempt the current process if in interrupt from user mode, 91 * or after the current trap/syscall if in system mode. 92 */ 93#define need_resched() { want_resched++; aston(); } 94 95/* 96 * Give a profiling tick to the current process when the user profiling 97 * buffer pages are invalid. On the x68k, request an ast to send us 98 * through trap, marking the proc as needing a profiling tick. 99 */ 100#define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); } 101 102/* 103 * Notify the current process (p) that it has a signal pending, 104 * process as soon as possible. 105 */ 106#define signotify(p) aston() 107 108#define aston() (astpending++) 109 110int astpending; /* need to trap before returning to user mode */ 111int want_resched; /* resched() was called */ 112 113 114/* 115 * simulated software interrupt register 116 */ 117extern unsigned char ssir; 118 119#define SIR_NET 0x1 120#define SIR_CLOCK 0x2 121#define SIR_SERIAL 0x4 122#define SIR_KBD 0x8 123 124#define siroff(x) ssir &= ~(x) 125#define setsoftnet() ssir |= SIR_NET 126#define setsoftclock() ssir |= SIR_CLOCK 127#define setsoftserial() ssir |= SIR_SERIAL 128#define setsoftkbd() ssir |= SIR_KBD 129 130/* 131 * CTL_MACHDEP definitions. 132 */ 133#define CPU_CONSDEV 1 /* dev_t: console terminal device */ 134#define CPU_MAXID 2 /* number of valid machdep ids */ 135 136#define CTL_MACHDEP_NAMES { \ 137 { 0, 0 }, \ 138 { "console_device", CTLTYPE_STRUCT }, \ 139} 140 141/* 142 * The rest of this should probably be moved to ../x68k/x68kcpu.h, 143 * although some of it could probably be put into generic 68k headers. 144 */ 145 146/* values for cpuspeed (not really related to clock speed due to caches) */ 147#define MHZ_8 1 148#define MHZ_16 2 149#define MHZ_25 3 150#define MHZ_33 4 151#define MHZ_50 6 152 153#ifdef _KERNEL 154extern int machineid; 155extern char *intiolimit; 156 157/* autoconf.c functions */ 158void configure __P((void)); 159void config_console __P((void)); 160 161/* fpu.c functions */ 162int fpu_probe __P((void)); 163 164/* machdep.c functions */ 165void dumpconf __P((void)); 166void dumpsys __P((void)); 167 168/* locore.s functions */ 169struct pcb; 170struct fpframe; 171void savectx __P((struct pcb *)); 172void switch_exit __P((struct proc *)); 173void proc_trampoline __P((void)); 174u_long getdfc __P((void)); 175u_long getsfc __P((void)); 176void loadustp __P((int)); 177void m68881_save __P((struct fpframe *)); 178void m68881_restore __P((struct fpframe *)); 179void DCIS __P((void)); 180void DCIU __P((void)); 181void ICIA __P((void)); 182void ICPA __P((void)); 183void PCIA __P((void)); 184void TBIA __P((void)); 185void TBIS __P((vm_offset_t)); 186void TBIAS __P((void)); 187void TBIAU __P((void)); 188#if defined(M68040) || defined(M68060) 189void DCFA __P((void)); 190void DCFP __P((vm_offset_t)); 191void DCFL __P((vm_offset_t)); 192void DCPL __P((vm_offset_t)); 193void DCPP __P((vm_offset_t)); 194void ICPL __P((vm_offset_t)); 195void ICPP __P((vm_offset_t)); 196#endif 197 198/* sys_machdep.c functions */ 199int cachectl __P((int, caddr_t, int)); 200int dma_cachectl __P((caddr_t, int)); 201 202/* vm_machdep.c functions */ 203void physaccess __P((caddr_t, caddr_t, int, int)); 204void physunaccess __P((caddr_t, int)); 205int kvtop __P((caddr_t)); 206 207#endif 208 209/* physical memory sections */ 210#define INTIOBASE (0x00C00000) 211#define INTIOTOP (0x01000000) 212 213/* 214 * Internal IO space: 215 * 216 * Ranges from 0xC00000 to 0x1000000 (IIOMAPSIZE). 217 * 218 * Internal IO space is mapped in the kernel from ``IODEVbase'' to 219 * ``intiolimit'' (defined in locore.s). Since it is always mapped, 220 * conversion between physical and kernel virtual addresses is easy. 221 */ 222#define IIOPOFF(pa) ((int)(pa)-INTIOBASE) 223#define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 4mb */ 224 225#endif /* _X68K_CPU_H_ */ 226