cpu.h revision 1.22
1/*	$NetBSD: cpu.h,v 1.22 2000/04/23 05:38:31 minoura Exp $	*/
2
3/*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 *	The Regents of the University of California.  All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 *    must display the following acknowledgement:
22 *	This product includes software developed by the University of
23 *	California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 *    may be used to endorse or promote products derived from this software
26 *    without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
43 */
44
45#ifndef _X68K_CPU_H_
46#define	_X68K_CPU_H_
47
48/*
49 * Exported definitions unique to x68k/68k cpu support.
50 */
51
52#if defined(_KERNEL) && !defined(_LKM)
53#include "opt_m680x0.h"
54#endif
55
56/*
57 * Get common m68k CPU definitions.
58 */
59#include <m68k/cpu.h>
60#include <m68k/cacheops.h>
61#define	M68K_MMU_MOTOROLA
62
63/*
64 * Get interrupt glue.
65 */
66#include <machine/intr.h>
67
68/*
69 * definitions of cpu-dependent requirements
70 * referenced in generic code
71 */
72#define	cpu_swapin(p)			/* nothing */
73#define	cpu_wait(p)			/* nothing */
74#define	cpu_swapout(p)			/* nothing */
75#define	cpu_number()			0
76
77/*
78 * Arguments to hardclock and gatherstats encapsulate the previous
79 * machine state in an opaque clockframe.  One the x68k, we use
80 * what the hardware pushes on an interrupt (frame format 0).
81 */
82struct clockframe {
83	u_short	sr;		/* sr at time of interrupt */
84	u_long	pc;		/* pc at time of interrupt */
85	u_short	vo;		/* vector offset (4-word frame) */
86};
87
88#define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
89#define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
90#define	CLKF_PC(framep)		((framep)->pc)
91#if 0
92/* We would like to do it this way... */
93#define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
94#else
95/* but until we start using PSL_M, we have to do this instead */
96#define	CLKF_INTR(framep)	(0)	/* XXX */
97#endif
98
99
100/*
101 * Preempt the current process if in interrupt from user mode,
102 * or after the current trap/syscall if in system mode.
103 */
104extern int want_resched;	/* resched() was called */
105#define	need_resched()	{ want_resched++; aston(); }
106
107/*
108 * Give a profiling tick to the current process when the user profiling
109 * buffer pages are invalid.  On the x68k, request an ast to send us
110 * through trap, marking the proc as needing a profiling tick.
111 */
112#define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
113
114/*
115 * Notify the current process (p) that it has a signal pending,
116 * process as soon as possible.
117 */
118#define	signotify(p)	aston()
119
120extern int astpending;		/* need to trap before returning to user mode */
121#define aston() (astpending++)
122
123/*
124 * CTL_MACHDEP definitions.
125 */
126#define	CPU_CONSDEV		1	/* dev_t: console terminal device */
127#define	CPU_MAXID		2	/* number of valid machdep ids */
128
129#define CTL_MACHDEP_NAMES { \
130	{ 0, 0 }, \
131	{ "console_device", CTLTYPE_STRUCT }, \
132}
133
134/*
135 * The rest of this should probably be moved to <machine/x68kcpu.h>
136 * although some of it could probably be put into generic 68k headers.
137 */
138
139#ifdef _KERNEL
140extern int machineid;
141extern char *intiolimit;
142
143/* autoconf.c functions */
144void	config_console __P((void));
145
146/* fpu.c functions */
147int	fpu_probe __P((void));
148
149/* machdep.c functions */
150void	dumpconf __P((void));
151void	dumpsys __P((void));
152
153/* locore.s functions */
154struct pcb;
155struct fpframe;
156int	suline __P((caddr_t, caddr_t));
157void	savectx __P((struct pcb *));
158void	switch_exit __P((struct proc *));
159void	proc_trampoline __P((void));
160void	loadustp __P((int));
161void	m68881_save __P((struct fpframe *));
162void	m68881_restore __P((struct fpframe *));
163
164/* machdep.c functions */
165int	badaddr __P((caddr_t));
166int	badbaddr __P((caddr_t));
167
168/* sys_machdep.c functions */
169int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
170int	dma_cachectl __P((caddr_t, int));
171
172/* vm_machdep.c functions */
173void	physaccess __P((caddr_t, caddr_t, int, int));
174void	physunaccess __P((caddr_t, int));
175int	kvtop __P((caddr_t));
176
177/* trap.c functions */
178void	child_return __P((void *));
179
180#endif
181
182/* physical memory sections */
183#define INTIOBASE	(0x00C00000)
184#define INTIOTOP	(0x01000000)
185
186/*
187 * Internal IO space:
188 *
189 * Ranges from 0xC00000 to 0x1000000 (IIOMAPSIZE).
190 *
191 * Internal IO space is mapped in the kernel from ``IODEVbase'' to
192 * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
193 * conversion between physical and kernel virtual addresses is easy.
194 */
195#define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
196#define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 4mb */
197
198#endif /* _X68K_CPU_H_ */
199