cpu.h revision 1.20
1/*	$NetBSD: cpu.h,v 1.20 1999/09/23 15:24:34 minoura Exp $	*/
2
3/*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 *	The Regents of the University of California.  All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 *    must display the following acknowledgement:
22 *	This product includes software developed by the University of
23 *	California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 *    may be used to endorse or promote products derived from this software
26 *    without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
43 */
44
45#ifndef _X68K_CPU_H_
46#define	_X68K_CPU_H_
47
48/*
49 * Exported definitions unique to x68k/68k cpu support.
50 */
51
52/*
53 * Get common m68k CPU definitions.
54 */
55#include <m68k/cpu.h>
56#include <m68k/cacheops.h>
57#define	M68K_MMU_MOTOROLA
58
59/*
60 * Get interrupt glue.
61 */
62#include <machine/intr.h>
63
64/*
65 * definitions of cpu-dependent requirements
66 * referenced in generic code
67 */
68#define	cpu_swapin(p)			/* nothing */
69#define	cpu_wait(p)			/* nothing */
70#define	cpu_swapout(p)			/* nothing */
71#define	cpu_number()			0
72
73/*
74 * Arguments to hardclock and gatherstats encapsulate the previous
75 * machine state in an opaque clockframe.  One the x68k, we use
76 * what the hardware pushes on an interrupt (frame format 0).
77 */
78struct clockframe {
79	u_short	sr;		/* sr at time of interrupt */
80	u_long	pc;		/* pc at time of interrupt */
81	u_short	vo;		/* vector offset (4-word frame) */
82};
83
84#define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
85#define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
86#define	CLKF_PC(framep)		((framep)->pc)
87#if 0
88/* We would like to do it this way... */
89#define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
90#else
91/* but until we start using PSL_M, we have to do this instead */
92#define	CLKF_INTR(framep)	(0)	/* XXX */
93#endif
94
95
96/*
97 * Preempt the current process if in interrupt from user mode,
98 * or after the current trap/syscall if in system mode.
99 */
100extern int want_resched;	/* resched() was called */
101#define	need_resched()	{ want_resched++; aston(); }
102
103/*
104 * Give a profiling tick to the current process when the user profiling
105 * buffer pages are invalid.  On the x68k, request an ast to send us
106 * through trap, marking the proc as needing a profiling tick.
107 */
108#define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
109
110/*
111 * Notify the current process (p) that it has a signal pending,
112 * process as soon as possible.
113 */
114#define	signotify(p)	aston()
115
116extern int astpending;		/* need to trap before returning to user mode */
117#define aston() (astpending++)
118
119/*
120 * CTL_MACHDEP definitions.
121 */
122#define	CPU_CONSDEV		1	/* dev_t: console terminal device */
123#define	CPU_MAXID		2	/* number of valid machdep ids */
124
125#define CTL_MACHDEP_NAMES { \
126	{ 0, 0 }, \
127	{ "console_device", CTLTYPE_STRUCT }, \
128}
129
130/*
131 * The rest of this should probably be moved to <machine/x68kcpu.h>
132 * although some of it could probably be put into generic 68k headers.
133 */
134
135#ifdef _KERNEL
136extern int machineid;
137extern char *intiolimit;
138
139/* autoconf.c functions */
140void	config_console __P((void));
141
142/* fpu.c functions */
143int	fpu_probe __P((void));
144
145/* machdep.c functions */
146void	dumpconf __P((void));
147void	dumpsys __P((void));
148
149/* locore.s functions */
150struct pcb;
151struct fpframe;
152int	suline __P((caddr_t, caddr_t));
153void	savectx __P((struct pcb *));
154void	switch_exit __P((struct proc *));
155void	proc_trampoline __P((void));
156void	loadustp __P((int));
157void	m68881_save __P((struct fpframe *));
158void	m68881_restore __P((struct fpframe *));
159
160/* machdep.c functions */
161int	badaddr __P((caddr_t));
162int	badbaddr __P((caddr_t));
163
164/* sys_machdep.c functions */
165int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
166int	dma_cachectl __P((caddr_t, int));
167
168/* vm_machdep.c functions */
169void	physaccess __P((caddr_t, caddr_t, int, int));
170void	physunaccess __P((caddr_t, int));
171int	kvtop __P((caddr_t));
172
173/* trap.c functions */
174void	child_return __P((void *));
175
176#endif
177
178/* physical memory sections */
179#define INTIOBASE	(0x00C00000)
180#define INTIOTOP	(0x01000000)
181
182/*
183 * Internal IO space:
184 *
185 * Ranges from 0xC00000 to 0x1000000 (IIOMAPSIZE).
186 *
187 * Internal IO space is mapped in the kernel from ``IODEVbase'' to
188 * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
189 * conversion between physical and kernel virtual addresses is easy.
190 */
191#define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
192#define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 4mb */
193
194#endif /* _X68K_CPU_H_ */
195