psmreg.h revision 1.1
150397Sobrien/* 2169689Skan * Copyright (c) 2006 Itronix Inc. 3132718Skan * All rights reserved. 450397Sobrien * 5132718Skan * Ported from Tadpole Solaris sources by Garrett D'Amore for Itronix Inc. 650397Sobrien * 7132718Skan * Redistribution and use in source and binary forms, with or without 850397Sobrien * modification, are permitted provided that the following conditions 950397Sobrien * are met: 1050397Sobrien * 1. Redistributions of source code must retain the above copyright 1150397Sobrien * notice, this list of conditions and the following disclaimer. 12132718Skan * 2. Redistributions in binary form must reproduce the above copyright 1350397Sobrien * notice, this list of conditions and the following disclaimer in the 1450397Sobrien * documentation and/or other materials provided with the distribution. 1550397Sobrien * 3. The name of Itronix Inc. may not be used to endorse 1650397Sobrien * or promote products derived from this software without specific 1750397Sobrien * prior written permission. 18132718Skan * 19169689Skan * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 20169689Skan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2150397Sobrien * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2250397Sobrien * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 2350397Sobrien * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24132718Skan * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25132718Skan * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 2650397Sobrien * ON ANY THEORY OF LIABILITY, WHETHER IN 2750397Sobrien * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2890075Sobrien * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2950397Sobrien * POSSIBILITY OF SUCH DAMAGE. 3050397Sobrien */ 3150397Sobrien 3250397Sobrien/* 3350397Sobrien * Copyright (c) 2002 by Tadpole Technology 3450397Sobrien */ 3550397Sobrien 36117395Skan#ifndef PSM_H 3752284Sobrien#define PSM_H 3850397Sobrien 39132718Skan#define PSM_PRDL 0x00 /* Posted read data low byte */ 4050397Sobrien#define PSM_PRDU 0x01 /* Posted read data high byte */ 4150397Sobrien#define PSM_ISR 0x02 /* Interrupt status register */ 42132718Skan#define PSM_STAT 0x03 /* Status register */ 4350397Sobrien#define PSM_PSR0 0x04 /* Programmable status register #0 */ 4450397Sobrien#define PSM_PSR1 0x05 /* Programmable status register #1 */ 4550397Sobrien#define PSM_PSR2 0x06 /* Programmable status register #2 */ 4650397Sobrien#define PSM_PSR3 0x07 /* Programmable status register #3 */ 4750397Sobrien 4890075Sobrien#define PSM_PWDL 0x00 /* Posted write data low byte */ 4950397Sobrien#define PSM_PWDU 0x01 /* Posted write data high byte */ 5050397Sobrien#define PSM_IAR 0x02 /* Indirect access register */ 5150397Sobrien#define PSM_CMR 0x03 /* Command mode register */ 5250397Sobrien#define PSM_RSV1 0x04 /* Reserved */ 5350397Sobrien#define PSM_ICR 0x05 /* Interrupt clear register */ 5450397Sobrien#define PSM_RSV2 0x06 /* Reserved */ 5550397Sobrien#define PSM_MCR 0x07 /* Master command register */ 5650397Sobrien 5750397Sobrien/* Interrupt status register defenitions */ 5852284Sobrien 5950397Sobrien#define PSM_ISR_PO 0x01 /* Power switch activated */ 6052284Sobrien#define PSM_ISR_DK 0x02 /* System has been docked */ 6150397Sobrien#define PSM_ISR_UDK 0x04 /* System has been un-docked */ 6250397Sobrien#define PSM_ISR_LIDO 0x08 /* Transition to clamshell closed */ 63132718Skan#define PSM_ISR_LIDC 0x10 /* Transition to clamshell open */ 64132718Skan#define PSM_ISR_TMP 0x20 /* Over temperature condition detected */ 65132718Skan#define PSM_ISR_BCC 0x40 /* Battery configuration changed */ 6650397Sobrien#define PSM_ISR_RPD 0x80 /* Request to power down */ 6750397Sobrien 68132718Skan/* Status registert defenitions */ 6952284Sobrien 7050397Sobrien#define PSM_STAT_AC 0x01 /* Operating under AC power */ 71132718Skan#define PSM_STAT_OVT 0x02 /* Over temperature condition */ 72117395Skan#define PSM_STAT_UN1 0x04 /* Unused */ 7350397Sobrien#define PSM_STAT_UN2 0x08 /* Unused */ 7450397Sobrien#define PSM_STAT_ERR 0x10 /* Hardware error occured */ 7550397Sobrien#define PSM_STAT_MCR 0x20 /* Master Command Register busy */ 7650397Sobrien#define PSM_STAT_WBF 0x40 /* Write buffer full */ 7750397Sobrien#define PSM_STAT_RDA 0x80 /* Read data available */ 7850397Sobrien 7950397Sobrien/* Command Mode Register defenitions */ 8050397Sobrien 81169689Skan#define PSM_CMR_DATA(m,l,d,ra) (ra & 0x07) | \ 82169689Skan ((d & 0x01) << 3) | \ 83169689Skan ((l & 0x01) << 4) | \ 8450397Sobrien ((m & 0x07) << 5) 8550397Sobrien 8650397Sobrien#define PSM_MODE_SYSCFG 0x00 /* System configuration mode */ 8750397Sobrien#define PSM_MODE_BQRW 0x01 /* Read write battery fuel guage */ 8850397Sobrien#define PSM_MODE_BCB 0x02 /* Battery status block control */ 89169689Skan#define PSM_MODE_PMPS 0x03 /* Power management policies/status */ 90169689Skan#define PSM_MODE_MISC 0x04 /* Misc. control / status registers */ 9152284Sobrien#define PSM_MODE_I2C 0x05 /* Direct I2C control */ 9250397Sobrien#define PSM_MODE_UN1 0x06 /* Unused */ 9350397Sobrien#define PSM_MODE_UN2 0x07 /* Unused */ 94169689Skan 9550397Sobrien#define PSM_L_8 0x00 96169689Skan#define PSM_L_16 0x01 97169689Skan 98169689Skan#define PSM_D_WR 0x00 99169689Skan#define PSM_D_RD 0x01 100169689Skan 101169689Skan/* Master Command Register defenitions */ 102169689Skan 10350397Sobrien#define PSM_MCR_NA1 0x01 /* Not available */ 104169689Skan#define PSM_MCR_NA2 0x02 /* Not available */ 105169689Skan#define PSM_MCR_NA3 0x04 /* Not available */ 106169689Skan#define PSM_MCR_AUTO 0x08 /* Enable active battery management */ 107169689Skan#define PSM_MCR_SD 0x10 /* Shutdown permission granted */ 108169689Skan#define PSM_MCR_MON 0x20 /* Monitor motherboard interrupts/dma */ 109169689Skan#define PSM_MCR_OBP 0x40 /* OBP done notification */ 110169689Skan#define PSM_MCR_RST 0x80 /* Reset PSMbus interface */ 111169689Skan 112169689Skan/* Mode dependant registers */ 11350397Sobrien 114117395Skan/* Mode 0 - System configuration */ 11550397Sobrien 11650397Sobrien#define PSM_SYSCFG_PSSR0 0x00 11750397Sobrien#define PSM_SYSCFG_PSCR0 0x01 11850397Sobrien#define PSM_SYSCFG_PSSR1 0x02 11950397Sobrien#define PSM_SYSCFG_PSCR1 0x03 12050397Sobrien#define PSM_SYSCFG_PSSR2 0x04 12150397Sobrien#define PSM_SYSCFG_PSCR2 0x05 12250397Sobrien#define PSM_SYSCFG_PSSR3 0x06 12350397Sobrien#define PSM_SYSCFG_PSCR3 0x07 12450397Sobrien 125132718Skan#define PSM_SYSCFG_PSSR(batt,fgr) (fgr & 0x1f ) | \ 12650397Sobrien ((batt & 0x07) << 5) 127132718Skan 128132718Skan#define PSM_SYSCFG_PSCR(e,lo,ti) (ti & 0x0f) | \ 129132718Skan ((lo & 0x01) << 6) | \ 130132718Skan ((e & 0x01) << 7) 13152284Sobrien 132132718Skan/* Mode 1 - Battery fuel guage read / write */ 13350397Sobrien 13452284Sobrien#define PSM_BQRW_CACHED 0x80 13552284Sobrien#define PSM_BQRW_REGMASK 0x1f 13652284Sobrien 137169689Skan/* Mode 2 - Battery control block read / write */ 13850397Sobrien 13952284Sobrien#define PSM_BCB_BATC0 0x00 14052284Sobrien#define PSM_BCB_BATC1 0x01 14152284Sobrien#define PSM_BCB_BATC2 0x02 14252284Sobrien#define PSM_BCB_BATC3 0x03 14352284Sobrien#define PSM_BCB_BATC4 0x04 14452284Sobrien 14552284Sobrien#define PSM_BCB_CR 0x01 /* Calibration required */ 14652284Sobrien#define PSM_BCB_BCF 0x02 /* Battery control block failure */ 14750397Sobrien#define PSM_BCB_FGF 0x04 /* Fuel guage failure */ 14850397Sobrien#define PSM_BCB_FULL 0x08 /* Battery is full */ 14952284Sobrien#define PSM_BCB_CHG 0x10 /* Battery pack charging */ 15050397Sobrien#define PSM_BCB_USE 0x20 /* Battery pack in use */ 15152284Sobrien#define PSM_BCB_E 0x40 /* Battery pack enabled */ 15250397Sobrien#define PSM_BCB_IN 0x80 /* Battery pack in use */ 15350397Sobrien 15450397Sobrien/* Mode 4 - Miscellaneous control/status registers */ 15550397Sobrien 156132718Skan#define PSM_MISC_HVER 0x00 /* Hardware version number */ 157169689Skan#define PSM_MISC_FVER 0x01 /* Firmware version number */ 158132718Skan#define PSM_MISC_BLITE 0x10 /* Backlight intensity register */ 15950397Sobrien#define PSM_MISC_IMR 0x20 /* Interrupt mask register */ 16050397Sobrien#define PSM_MISC_UPS 0x21 /* UPS battery pack number */ 16150397Sobrien#define PSM_MISC_FMTA 0x30 /* Battery format registers */ 162117395Skan#define PSM_MISC_FMTB 0x31 /* Battery format registers */ 163117395Skan#define PSM_MISC_FMTC 0x32 /* Battery format registers */ 164117395Skan#define PSM_MISC_FMTD 0x33 /* Battery format registers */ 165132718Skan#define PSM_MISC_FAN0 0x40 /* Fan control */ 16650397Sobrien#define PSM_MISC_FAN1 0x41 /* Fan control */ 16750397Sobrien#define PSM_MISC_FAN2 0x42 /* Fan control */ 16850397Sobrien#define PSM_MISC_FAN3 0x43 /* Fan control */ 16950397Sobrien#define PSM_MISC_FAN4 0x44 /* Fan control */ 17050397Sobrien#define PSM_MISC_AD0 0x50 /* Processor internal thermal */ 17152284Sobrien#define PSM_MISC_AD1 0x51 /* Processor vicinity thermal */ 172169689Skan#define PSM_MISC_AD2 0x52 /* Processor case thermal */ 173169689Skan#define PSM_MISC_AD3 0x53 /* Clamshell ambient thermal */ 174169689Skan#define PSM_MISC_AD4 0x54 /* Reserved */ 175132718Skan#define PSM_MISC_AD5 0x55 /* Reserved */ 176117395Skan#define PSM_MISC_AD6 0x56 /* Reserved */ 177117395Skan#define PSM_MISC_AD7 0x57 /* Discharge bus voltage */ 17850397Sobrien#define PSM_MISC_XMON 0x60 /* External monitor */ 179132718Skan#define PSM_MISC_PCYCLE 0x70 /* Power cycle */ 18050397Sobrien#define PSM_MISC_ERROR0 0x80 18152284Sobrien#define PSM_MISC_ERROR1 0x81 182169689Skan#define PSM_MISC_PEM 0x90 18352284Sobrien#define PSM_MISC_PEMAD0 0xa0 18452284Sobrien#define PSM_MISC_PEMAD1 0xa1 18550397Sobrien#define PSM_MISC_PEMAD2 0xa2 18650397Sobrien#define PSM_MISC_PEMAD3 0xa3 18750397Sobrien 18850397Sobrien/* Masks */ 18950397Sobrien 19050397Sobrien#define PSM_FAN_MASK 0x1f /* 0-31 */ 19150397Sobrien 19250397Sobrien/* Interrupt mask register defenitions */ 19350397Sobrien 19450397Sobrien#define PSM_IMR_MBCC 0x40 /* Battery config change interrupt */ 195132718Skan#define PSM_IMR_MTMP 0x20 /* Over temp interrupt */ 19650397Sobrien#define PSM_IMR_MLIDC 0x10 /* Lid close interrupt */ 197132718Skan#define PSM_IMR_MLIDO 0x08 /* Lid close interrupt */ 198132718Skan#define PSM_IMR_MD 0x04 /* Dock/undock interrupts */ 199132718Skan#define PSM_IMR_MPS 0x01 /* Master power switch interrupt */ 200132718Skan 20150397Sobrien#define PSM_IMR_ALL PSM_IMR_MBCC|PSM_IMR_MTMP|PSM_IMR_MLIDO|PSM_IMR_MLIDC \ 202132718Skan |PSM_IMR_MD|PSM_IMR_MPS 20350397Sobrien 20450397Sobrien/* Battery information */ 20550397Sobrien 206169689Skan#define PSM_MAX_BATTERIES 1 207169689Skan#define PSM_VBATT 11100 /* 11.1v nominal battery voltage */ 208169689Skan 209169689Skan#endif /* PSMREG_H */ 210169689Skan