pci_machdep.c revision 1.71
1/* $NetBSD: pci_machdep.c,v 1.71 2011/04/04 20:37:54 dyoung Exp $ */ 2 3/* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * functions expected by the MI PCI code. 31 */ 32 33#include <sys/cdefs.h> 34__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.71 2011/04/04 20:37:54 dyoung Exp $"); 35 36#include <sys/types.h> 37#include <sys/param.h> 38#include <sys/time.h> 39#include <sys/systm.h> 40#include <sys/errno.h> 41#include <sys/device.h> 42#include <sys/malloc.h> 43 44#define _SPARC_BUS_DMA_PRIVATE 45#include <machine/bus.h> 46#include <machine/autoconf.h> 47#include <machine/openfirm.h> 48#include <dev/pci/pcivar.h> 49#include <dev/pci/pcireg.h> 50 51#include <dev/ofw/ofw_pci.h> 52 53#include <sparc64/dev/iommureg.h> 54#include <sparc64/sparc64/cache.h> 55 56#include "locators.h" 57 58#ifdef DEBUG 59#define SPDB_CONF 0x01 60#define SPDB_INTR 0x04 61#define SPDB_INTMAP 0x08 62#define SPDB_PROBE 0x20 63#define SPDB_TAG 0x40 64int sparc_pci_debug = 0x0; 65#define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0) 66#else 67#define DPRINTF(l, s) 68#endif 69 70/* this is a base to be copied */ 71struct sparc_pci_chipset _sparc_pci_chipset = { 72 .cookie = NULL, 73}; 74 75static pcitag_t 76ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f) 77{ 78 pcitag_t tag; 79 pcireg_t reg; 80 81 tag = PCITAG_CREATE(node, b, d, f); 82 83 DPRINTF(SPDB_TAG, 84 ("%s: creating tag for node %x bus %d dev %d fn %d\n", 85 __func__, node, b, d, f)); 86 87 /* Enable all the different spaces for this device */ 88 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 89 reg |= PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE| 90 PCI_COMMAND_IO_ENABLE; 91 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg); 92 93 return (tag); 94} 95 96/* 97 * functions provided to the MI code. 98 */ 99 100void 101pci_attach_hook(struct device *parent, struct device *self, 102 struct pcibus_attach_args *pba) 103{ 104} 105 106int 107pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 108{ 109 110 return 32; 111} 112 113pcitag_t 114pci_make_tag(pci_chipset_tag_t pc, int b, int d, int f) 115{ 116 struct ofw_pci_register reg; 117 pcitag_t tag; 118 int (*valid)(void *); 119 int node, len; 120#ifdef DEBUG 121 char name[80]; 122 memset(name, 0, sizeof(name)); 123#endif 124 125 /* 126 * Refer to the PCI/CardBus bus node first. 127 * It returns a tag if node is present and bus is valid. 128 */ 129 if (0 <= b && b < 256) { 130 KASSERT(pc->spc_busnode != NULL); 131 node = (*pc->spc_busnode)[b].node; 132 valid = (*pc->spc_busnode)[b].valid; 133 if (node != 0 && d == 0 && 134 (valid == NULL || (*valid)((*pc->spc_busnode)[b].arg))) 135 return ofpci_make_tag(pc, node, b, d, f); 136 } 137 138 /* 139 * Hunt for the node that corresponds to this device 140 * 141 * We could cache this info in an array in the parent 142 * device... except then we have problems with devices 143 * attached below pci-pci bridges, and we would need to 144 * add special code to the pci-pci bridge to cache this 145 * info. 146 */ 147 148 tag = PCITAG_CREATE(-1, b, d, f); 149 node = pc->rootnode; 150 /* 151 * First make sure we're on the right bus. If our parent 152 * has a bus-range property and we're not in the range, 153 * then we're obviously on the wrong bus. So go up one 154 * level. 155 */ 156#ifdef DEBUG 157 if (sparc_pci_debug & SPDB_PROBE) { 158 printf("curnode %x %s\n", node, 159 prom_getpropstringA(node, "name", name, sizeof(name))); 160 } 161#endif 162#if 0 163 while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange, 164 sizeof(busrange)) == sizeof(busrange)) && 165 (b < busrange[0] || b > busrange[1])) { 166 /* Out of range, go up one */ 167 node = OF_parent(node); 168#ifdef DEBUG 169 if (sparc_pci_debug & SPDB_PROBE) { 170 printf("going up to node %x %s\n", node, 171 prom_getpropstringA(node, "name", name, sizeof(name))); 172 } 173#endif 174 } 175#endif 176 /* 177 * Now traverse all peers until we find the node or we find 178 * the right bridge. 179 * 180 * XXX We go up one and down one to make sure nobody's missed. 181 * but this should not be necessary. 182 */ 183 for (node = ((node)); node; node = prom_nextsibling(node)) { 184 185#ifdef DEBUG 186 if (sparc_pci_debug & SPDB_PROBE) { 187 printf("checking node %x %s\n", node, 188 prom_getpropstringA(node, "name", name, sizeof(name))); 189 190 } 191#endif 192 193#if 1 194 /* 195 * Check for PCI-PCI bridges. If the device we want is 196 * in the bus-range for that bridge, work our way down. 197 */ 198 while (1) { 199 int busrange[2], *brp; 200 len = 2; 201 brp = busrange; 202 if (prom_getprop(node, "bus-range", sizeof(*brp), 203 &len, &brp) != 0) 204 break; 205 if (len != 2 || b < busrange[0] || b > busrange[1]) 206 break; 207 /* Go down 1 level */ 208 node = prom_firstchild(node); 209#ifdef DEBUG 210 if (sparc_pci_debug & SPDB_PROBE) { 211 printf("going down to node %x %s\n", node, 212 prom_getpropstringA(node, "name", 213 name, sizeof(name))); 214 } 215#endif 216 } 217#endif /*1*/ 218 /* 219 * We only really need the first `reg' property. 220 * 221 * For simplicity, we'll query the `reg' when we 222 * need it. Otherwise we could malloc() it, but 223 * that gets more complicated. 224 */ 225 len = prom_getproplen(node, "reg"); 226 if (len < sizeof(reg)) 227 continue; 228 if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len) 229 panic("pci_probe_bus: OF_getprop len botch"); 230 231 if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi)) 232 continue; 233 if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi)) 234 continue; 235 if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi)) 236 continue; 237 238 /* Got a match */ 239 tag = ofpci_make_tag(pc, node, b, d, f); 240 241 return (tag); 242 } 243 /* No device found -- return a dead tag */ 244 return (tag); 245} 246 247void 248pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 249{ 250 251 if (bp != NULL) 252 *bp = PCITAG_BUS(tag); 253 if (dp != NULL) 254 *dp = PCITAG_DEV(tag); 255 if (fp != NULL) 256 *fp = PCITAG_FUN(tag); 257} 258 259int 260sparc64_pci_enumerate_bus(struct pci_softc *sc, const int *locators, 261 int (*match)(const struct pci_attach_args *), struct pci_attach_args *pap) 262{ 263 struct ofw_pci_register reg; 264 pci_chipset_tag_t pc = sc->sc_pc; 265 pcitag_t tag; 266 pcireg_t class, csr, bhlc, ic; 267 int node, b, d, f, ret; 268 int bus_frequency, lt, cl, cacheline; 269 char name[30]; 270#if 0 271 extern int pci_config_dump; 272#endif 273 274 if (sc->sc_bridgetag) 275 node = PCITAG_NODE(*sc->sc_bridgetag); 276 else 277 node = pc->rootnode; 278 279 bus_frequency = 280 prom_getpropint(node, "clock-frequency", 33000000) / 1000000; 281 282 /* 283 * Make sure the cache line size is at least as big as the 284 * ecache line and the streaming cache (64 byte). 285 */ 286 cacheline = max(ecache_min_line_size, 64); 287 KASSERT((cacheline/64)*64 == cacheline && 288 (cacheline/ecache_min_line_size)*ecache_min_line_size == cacheline && 289 (cacheline/4)*4 == cacheline); 290 291#if 0 292 /* 293 * XXX this faults on Fire PCIe controllers. 294 * XXX move into the psycho and schizo driver front ends. 295 */ 296 /* Turn on parity for the bus. */ 297 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0); 298 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 299 csr |= PCI_COMMAND_PARITY_ENABLE; 300 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 301 302 /* 303 * Initialize the latency timer register. 304 * The value 0x40 is from Solaris. 305 */ 306 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 307 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 308 bhlc |= 0x40 << PCI_LATTIMER_SHIFT; 309 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 310 311 if (pci_config_dump) 312 pci_conf_print(pc, tag, NULL); 313#endif 314 315 for (node = prom_firstchild(node); node != 0 && node != -1; 316 node = prom_nextsibling(node)) { 317 name[0] = name[29] = 0; 318 prom_getpropstringA(node, "name", name, sizeof(name)); 319 320 if (OF_getprop(node, "class-code", &class, sizeof(class)) != 321 sizeof(class)) 322 continue; 323 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg)) 324 panic("pci_enumerate_bus: \"%s\" regs too small", name); 325 326 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi); 327 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi); 328 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi); 329 330 if (sc->sc_bus != b) { 331 aprint_error_dev(sc->sc_dev, "WARNING: incorrect " 332 "bus # for \"%s\" (%d/%d/%d)\n", name, b, d, f); 333 continue; 334 } 335 if ((locators[PCICF_DEV] != PCICF_DEV_DEFAULT) && 336 (locators[PCICF_DEV] != d)) 337 continue; 338 if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT) && 339 (locators[PCICF_FUNCTION] != f)) 340 continue; 341 342 tag = ofpci_make_tag(pc, node, b, d, f); 343 344 /* 345 * Turn on parity and fast-back-to-back for the device. 346 */ 347 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 348 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT) 349 csr |= PCI_COMMAND_BACKTOBACK_ENABLE; 350 csr |= PCI_COMMAND_PARITY_ENABLE; 351 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 352 353 /* 354 * Initialize the latency timer register for busmaster 355 * devices to work properly. 356 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD) 357 * Also initialize the cache line size register. 358 * Solaris anytime sets this register to the value 0x10. 359 */ 360 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 361 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 362 363 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255); 364 if (lt == 0 || lt < PCI_LATTIMER(bhlc)) 365 lt = PCI_LATTIMER(bhlc); 366 367 cl = PCI_CACHELINE(bhlc); 368 if (cl == 0) 369 cl = cacheline; 370 371 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) | 372 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT)); 373 bhlc |= (lt << PCI_LATTIMER_SHIFT) | 374 (cl << PCI_CACHELINE_SHIFT); 375 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 376 377 ret = pci_probe_device(sc, tag, match, pap); 378 if (match != NULL && ret != 0) 379 return (ret); 380 } 381 return (0); 382} 383 384const char * 385pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 386{ 387 static char str[16]; 388 389 sprintf(str, "ivec %x", ih); 390 DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str)); 391 392 return (str); 393} 394 395const struct evcnt * 396pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 397{ 398 399 /* XXX for now, no evcnt parent reported */ 400 return NULL; 401} 402 403int 404pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 405 int attr, uint64_t data) 406{ 407 408 switch (attr) { 409 case PCI_INTR_MPSAFE: 410 return 0; 411 default: 412 return ENODEV; 413 } 414} 415 416/* 417 * interrupt mapping foo. 418 * XXX: how does this deal with multiple interrupts for a device? 419 */ 420int 421pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 422{ 423 pcitag_t tag = pa->pa_tag; 424 int interrupts[4], *intp, int_used; 425 int len, node = PCITAG_NODE(tag); 426 char devtype[30]; 427 428 intp = &interrupts[0]; 429 len = prom_getproplen(node, "interrupts"); 430 if (len > sizeof(interrupts)) { 431 DPRINTF(SPDB_INTMAP, 432 ("pci_intr_map: too many available interrupts\n")); 433 return (ENODEV); 434 } 435 if (prom_getprop(node, "interrupts", len, 436 &len, &intp) != 0 || len != 1) { 437 DPRINTF(SPDB_INTMAP, 438 ("pci_intr_map: could not read interrupts\n")); 439 return (ENODEV); 440 } 441 442 /* XXX We pick the first interrupt, but should do better */ 443 int_used = interrupts[0]; 444 if (OF_mapintr(node, &int_used, sizeof(int_used), 445 sizeof(int_used)) < 0) { 446 printf("OF_mapintr failed\n"); 447 if (pa->pa_pc->spc_find_ino) 448 pa->pa_pc->spc_find_ino(pa, &int_used); 449 } 450 DPRINTF(SPDB_INTMAP, ("OF_mapintr() gave %x\n", int_used)); 451 452 /* Try to find an IPL for this type of device. */ 453 prom_getpropstringA(node, "device_type", devtype, sizeof(devtype)); 454 for (len = 0; intrmap[len].in_class != NULL; len++) 455 if (strcmp(intrmap[len].in_class, devtype) == 0) { 456 int_used |= INTLEVENCODE(intrmap[len].in_lev); 457 DPRINTF(SPDB_INTMAP, ("reset to %x\n", int_used)); 458 break; 459 } 460 461 *ihp = int_used; 462 463 /* Call the sub-driver is necessary */ 464 if (pa->pa_pc->spc_intr_map) 465 (*pa->pa_pc->spc_intr_map)(pa, ihp); 466 467 return (0); 468} 469 470void 471pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 472{ 473 474 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie)); 475 476 /* XXX */ 477 /* panic("can't disestablish PCI interrupts yet"); */ 478} 479 480int 481sparc_pci_childspace(int type) 482{ 483 int ss; 484 485 switch (type) { 486 case PCI_CONFIG_BUS_SPACE: 487 ss = 0x00; 488 break; 489 case PCI_IO_BUS_SPACE: 490 ss = 0x01; 491 break; 492 case PCI_MEMORY_BUS_SPACE: 493 ss = 0x02; 494 break; 495#if 0 496 /* we don't do 64 bit memory space */ 497 case PCI_MEMORY64_BUS_SPACE: 498 ss = 0x03; 499 break; 500#endif 501 default: 502 panic("get_childspace: unknown bus type: %d", type); 503 } 504 505 return (ss); 506} 507