pci_machdep.c revision 1.64
1/* $NetBSD: pci_machdep.c,v 1.64 2009/11/28 21:32:46 mrg Exp $ */ 2 3/* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * functions expected by the MI PCI code. 31 */ 32 33#include <sys/cdefs.h> 34__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.64 2009/11/28 21:32:46 mrg Exp $"); 35 36#include <sys/types.h> 37#include <sys/param.h> 38#include <sys/time.h> 39#include <sys/systm.h> 40#include <sys/errno.h> 41#include <sys/device.h> 42#include <sys/malloc.h> 43 44#define _SPARC_BUS_DMA_PRIVATE 45#include <machine/bus.h> 46#include <machine/autoconf.h> 47#include <machine/openfirm.h> 48#include <dev/pci/pcivar.h> 49#include <dev/pci/pcireg.h> 50 51#include <dev/ofw/ofw_pci.h> 52 53#include <sparc64/dev/iommureg.h> 54#include <sparc64/dev/iommuvar.h> 55#include <sparc64/dev/psychoreg.h> 56#include <sparc64/dev/psychovar.h> 57#include <sparc64/sparc64/cache.h> 58 59#include "locators.h" 60 61#ifdef DEBUG 62#define SPDB_CONF 0x01 63#define SPDB_INTR 0x04 64#define SPDB_INTMAP 0x08 65#define SPDB_PROBE 0x20 66#define SPDB_TAG 0x40 67int sparc_pci_debug = 0x0; 68#define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0) 69#else 70#define DPRINTF(l, s) 71#endif 72 73/* this is a base to be copied */ 74struct sparc_pci_chipset _sparc_pci_chipset = { 75 .cookie = NULL, 76}; 77 78static pcitag_t 79ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f) 80{ 81 pcitag_t tag; 82 pcireg_t reg; 83 84 tag = PCITAG_CREATE(node, b, d, f); 85 86 DPRINTF(SPDB_TAG, 87 ("%s: creating tag for node %d bus %d dev %d fn %d\n", 88 __func__, node, b, d, f)); 89 90 /* Enable all the different spaces for this device */ 91 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 92 reg |= PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE| 93 PCI_COMMAND_IO_ENABLE; 94 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg); 95 96 return (tag); 97} 98 99/* 100 * functions provided to the MI code. 101 */ 102 103void 104pci_attach_hook(struct device *parent, struct device *self, 105 struct pcibus_attach_args *pba) 106{ 107} 108 109int 110pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 111{ 112 113 return 32; 114} 115 116pcitag_t 117pci_make_tag(pci_chipset_tag_t pc, int b, int d, int f) 118{ 119 struct ofw_pci_register reg; 120 pcitag_t tag; 121 int (*valid)(void *); 122 int node, len; 123#ifdef DEBUG 124 char name[80]; 125 memset(name, 0, sizeof(name)); 126#endif 127 128 /* 129 * Refer to the PCI/CardBus bus node first. 130 * It returns a tag if node is present and bus is valid. 131 */ 132 if (0 <= b && b < 256) { 133 KASSERT(pc->spc_busnode != NULL); 134 node = (*pc->spc_busnode)[b].node; 135 valid = (*pc->spc_busnode)[b].valid; 136 if (node != 0 && d == 0 && 137 (valid == NULL || (*valid)((*pc->spc_busnode)[b].arg))) 138 return ofpci_make_tag(pc, node, b, d, f); 139 } 140 141 /* 142 * Hunt for the node that corresponds to this device 143 * 144 * We could cache this info in an array in the parent 145 * device... except then we have problems with devices 146 * attached below pci-pci bridges, and we would need to 147 * add special code to the pci-pci bridge to cache this 148 * info. 149 */ 150 151 tag = PCITAG_CREATE(-1, b, d, f); 152 node = pc->rootnode; 153 /* 154 * First make sure we're on the right bus. If our parent 155 * has a bus-range property and we're not in the range, 156 * then we're obviously on the wrong bus. So go up one 157 * level. 158 */ 159#ifdef DEBUG 160 if (sparc_pci_debug & SPDB_PROBE) { 161 printf("curnode %x %s\n", node, 162 prom_getpropstringA(node, "name", name, sizeof(name))); 163 } 164#endif 165#if 0 166 while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange, 167 sizeof(busrange)) == sizeof(busrange)) && 168 (b < busrange[0] || b > busrange[1])) { 169 /* Out of range, go up one */ 170 node = OF_parent(node); 171#ifdef DEBUG 172 if (sparc_pci_debug & SPDB_PROBE) { 173 printf("going up to node %x %s\n", node, 174 prom_getpropstringA(node, "name", name, sizeof(name))); 175 } 176#endif 177 } 178#endif 179 /* 180 * Now traverse all peers until we find the node or we find 181 * the right bridge. 182 * 183 * XXX We go up one and down one to make sure nobody's missed. 184 * but this should not be necessary. 185 */ 186 for (node = ((node)); node; node = prom_nextsibling(node)) { 187 188#ifdef DEBUG 189 if (sparc_pci_debug & SPDB_PROBE) { 190 printf("checking node %x %s\n", node, 191 prom_getpropstringA(node, "name", name, sizeof(name))); 192 193 } 194#endif 195 196#if 1 197 /* 198 * Check for PCI-PCI bridges. If the device we want is 199 * in the bus-range for that bridge, work our way down. 200 */ 201 while (1) { 202 int busrange[2], *brp; 203 len = 2; 204 brp = busrange; 205 if (prom_getprop(node, "bus-range", sizeof(*brp), 206 &len, &brp) != 0) 207 break; 208 if (len != 2 || b < busrange[0] || b > busrange[1]) 209 break; 210 /* Go down 1 level */ 211 node = prom_firstchild(node); 212#ifdef DEBUG 213 if (sparc_pci_debug & SPDB_PROBE) { 214 printf("going down to node %x %s\n", node, 215 prom_getpropstringA(node, "name", 216 name, sizeof(name))); 217 } 218#endif 219 } 220#endif /*1*/ 221 /* 222 * We only really need the first `reg' property. 223 * 224 * For simplicity, we'll query the `reg' when we 225 * need it. Otherwise we could malloc() it, but 226 * that gets more complicated. 227 */ 228 len = prom_getproplen(node, "reg"); 229 if (len < sizeof(reg)) 230 continue; 231 if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len) 232 panic("pci_probe_bus: OF_getprop len botch"); 233 234 if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi)) 235 continue; 236 if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi)) 237 continue; 238 if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi)) 239 continue; 240 241 /* Got a match */ 242 tag = ofpci_make_tag(pc, node, b, d, f); 243 244 return (tag); 245 } 246 /* No device found -- return a dead tag */ 247 return (tag); 248} 249 250void 251pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 252{ 253 254 if (bp != NULL) 255 *bp = PCITAG_BUS(tag); 256 if (dp != NULL) 257 *dp = PCITAG_DEV(tag); 258 if (fp != NULL) 259 *fp = PCITAG_FUN(tag); 260} 261 262int 263sparc64_pci_enumerate_bus(struct pci_softc *sc, const int *locators, 264 int (*match)(struct pci_attach_args *), struct pci_attach_args *pap) 265{ 266 struct ofw_pci_register reg; 267 pci_chipset_tag_t pc = sc->sc_pc; 268 pcitag_t tag; 269 pcireg_t class, csr, bhlc, ic; 270 int node, b, d, f, ret; 271 int bus_frequency, lt, cl, cacheline; 272 char name[30]; 273 extern int pci_config_dump; 274 275 if (sc->sc_bridgetag) 276 node = PCITAG_NODE(*sc->sc_bridgetag); 277 else 278 node = pc->rootnode; 279 280 bus_frequency = 281 prom_getpropint(node, "clock-frequency", 33000000) / 1000000; 282 283 /* 284 * Make sure the cache line size is at least as big as the 285 * ecache line and the streaming cache (64 byte). 286 */ 287 cacheline = max(ecache_min_line_size, 64); 288 KASSERT((cacheline/64)*64 == cacheline && 289 (cacheline/ecache_min_line_size)*ecache_min_line_size == cacheline && 290 (cacheline/4)*4 == cacheline); 291 292 /* Turn on parity for the bus. */ 293 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0); 294 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 295 csr |= PCI_COMMAND_PARITY_ENABLE; 296 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 297 298 /* 299 * Initialize the latency timer register. 300 * The value 0x40 is from Solaris. 301 */ 302 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 303 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 304 bhlc |= 0x40 << PCI_LATTIMER_SHIFT; 305 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 306 307 if (pci_config_dump) pci_conf_print(pc, tag, NULL); 308 309 for (node = prom_firstchild(node); node != 0 && node != -1; 310 node = prom_nextsibling(node)) { 311 name[0] = name[29] = 0; 312 prom_getpropstringA(node, "name", name, sizeof(name)); 313 314 if (OF_getprop(node, "class-code", &class, sizeof(class)) != 315 sizeof(class)) 316 continue; 317 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg)) 318 panic("pci_enumerate_bus: \"%s\" regs too small", name); 319 320 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi); 321 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi); 322 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi); 323 324 if (sc->sc_bus != b) { 325 aprint_error_dev(sc->sc_dev, "WARNING: incorrect " 326 "bus # for \"%s\" (%d/%d/%d)\n", name, b, d, f); 327 continue; 328 } 329 if ((locators[PCICF_DEV] != PCICF_DEV_DEFAULT) && 330 (locators[PCICF_DEV] != d)) 331 continue; 332 if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT) && 333 (locators[PCICF_FUNCTION] != f)) 334 continue; 335 336 tag = ofpci_make_tag(pc, node, b, d, f); 337 338 /* 339 * Turn on parity and fast-back-to-back for the device. 340 */ 341 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 342 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT) 343 csr |= PCI_COMMAND_BACKTOBACK_ENABLE; 344 csr |= PCI_COMMAND_PARITY_ENABLE; 345 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 346 347 /* 348 * Initialize the latency timer register for busmaster 349 * devices to work properly. 350 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD) 351 * Also initialize the cache line size register. 352 * Solaris anytime sets this register to the value 0x10. 353 */ 354 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 355 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 356 357 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255); 358 if (lt == 0 || lt < PCI_LATTIMER(bhlc)) 359 lt = PCI_LATTIMER(bhlc); 360 361 cl = PCI_CACHELINE(bhlc); 362 if (cl == 0) 363 cl = cacheline; 364 365 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) | 366 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT)); 367 bhlc |= (lt << PCI_LATTIMER_SHIFT) | 368 (cl << PCI_CACHELINE_SHIFT); 369 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 370 371 ret = pci_probe_device(sc, tag, match, pap); 372 if (match != NULL && ret != 0) 373 return (ret); 374 } 375 return (0); 376} 377 378/* 379 * interrupt mapping foo. 380 * XXX: how does this deal with multiple interrupts for a device? 381 */ 382int 383pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 384{ 385 pcitag_t tag = pa->pa_tag; 386 int interrupts, *intp; 387 int len, node = PCITAG_NODE(tag); 388 char devtype[30]; 389 390 intp = &interrupts; 391 len = 1; 392 if (prom_getprop(node, "interrupts", sizeof(interrupts), 393 &len, &intp) != 0 || len != 1) { 394 DPRINTF(SPDB_INTMAP, 395 ("pci_intr_map: could not read interrupts\n")); 396 return (ENODEV); 397 } 398 399 if (OF_mapintr(node, &interrupts, sizeof(interrupts), 400 sizeof(interrupts)) < 0) { 401 printf("OF_mapintr failed\n"); 402 KASSERT(pa->pa_pc->spc_find_ino); 403 pa->pa_pc->spc_find_ino(pa, &interrupts); 404 } 405 DPRINTF(SPDB_INTMAP, ("OF_mapintr() gave %x\n", interrupts)); 406 407 /* Try to find an IPL for this type of device. */ 408 prom_getpropstringA(node, "device_type", devtype, sizeof(devtype)); 409 for (len = 0; intrmap[len].in_class != NULL; len++) 410 if (strcmp(intrmap[len].in_class, devtype) == 0) { 411 interrupts |= INTLEVENCODE(intrmap[len].in_lev); 412 DPRINTF(SPDB_INTMAP, ("reset to %x\n", interrupts)); 413 break; 414 } 415 416 /* XXXX -- we use the ino. What if there is a valid IGN? */ 417 *ihp = interrupts; 418 return (0); 419} 420 421const char * 422pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 423{ 424 static char str[16]; 425 426 sprintf(str, "ivec %x", ih); 427 DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str)); 428 429 return (str); 430} 431 432const struct evcnt * 433pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 434{ 435 436 /* XXX for now, no evcnt parent reported */ 437 return NULL; 438} 439 440int 441pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 442 int attr, uint64_t data) 443{ 444 445 switch (attr) { 446 case PCI_INTR_MPSAFE: 447 return 0; 448 default: 449 return ENODEV; 450 } 451} 452 453void 454pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 455{ 456 457 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie)); 458 459 /* XXX */ 460 /* panic("can't disestablish PCI interrupts yet"); */ 461} 462 463int 464sparc_pci_childspace(int type) 465{ 466 int ss; 467 468 switch (type) { 469 case PCI_CONFIG_BUS_SPACE: 470 ss = 0x00; 471 break; 472 case PCI_IO_BUS_SPACE: 473 ss = 0x01; 474 break; 475 case PCI_MEMORY_BUS_SPACE: 476 ss = 0x02; 477 break; 478#if 0 479 /* we don't do 64 bit memory space */ 480 case PCI_MEMORY64_BUS_SPACE: 481 ss = 0x03; 482 break; 483#endif 484 default: 485 panic("get_childspace: unknown bus type"); 486 } 487 488 return (ss); 489} 490