1/*	$NetBSD: ebus.c,v 1.42 2022/01/22 11:49:16 thorpej Exp $ */
2
3/*
4 * Copyright (c) 1999, 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * EBus support for PCI based SPARC systems (ms-IIep, Ultra).
31 * EBus is documented in PCIO manual (Sun Part#: 802-7837-01).
32 */
33
34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.42 2022/01/22 11:49:16 thorpej Exp $");
36
37#if defined(DEBUG) && !defined(EBUS_DEBUG)
38#define EBUS_DEBUG
39#endif
40
41#ifdef EBUS_DEBUG
42#define	EDB_PROM	0x01
43#define EDB_CHILD	0x02
44#define	EDB_INTRMAP	0x04
45#define EDB_BUSMAP	0x08
46#define EDB_BUSDMA	0x10
47#define EDB_INTR	0x20
48int ebus_debug = 0;
49#define DPRINTF(l, s)   do { if (ebus_debug & l) printf s; } while (0)
50#else
51#define DPRINTF(l, s)
52#endif
53
54#include <sys/param.h>
55#include <sys/systm.h>
56#include <sys/device.h>
57#include <sys/errno.h>
58#include <sys/malloc.h>
59#include <sys/kmem.h>
60#include <sys/callout.h>
61#include <sys/kernel.h>
62
63#define _SPARC_BUS_DMA_PRIVATE
64#include <sys/bus.h>
65#include <machine/autoconf.h>
66
67#include <dev/pci/pcivar.h>
68#include <dev/pci/pcireg.h>
69#include <dev/pci/pcidevs.h>
70
71#include <dev/ofw/ofw_pci.h>
72
73#include <dev/ebus/ebusreg.h>
74#include <dev/ebus/ebusvar.h>
75
76#include "opt_blink.h"
77
78volatile uint32_t *ebus_LED = NULL;
79
80#ifdef BLINK
81static callout_t ebus_blink_ch;
82static void ebus_blink(void *);
83#endif
84
85struct ebus_softc {
86	device_t			sc_dev;
87	device_t			sc_parent;	/* PCI bus */
88
89	int				sc_node;	/* PROM node */
90
91	bus_space_tag_t			sc_bustag;	/* mem tag from pci */
92
93	/*
94	 * "reg" contains exactly the info we'd get by processing
95	 * "ranges", so don't bother with "ranges" and use "reg" directly.
96	 */
97	struct ofw_pci_register		*sc_reg;
98	int				sc_nreg;
99};
100
101static int	ebus_match(device_t, cfdata_t, void *);
102static void	ebus_attach(device_t, device_t, void *);
103
104CFATTACH_DECL_NEW(ebus, sizeof(struct ebus_softc),
105    ebus_match, ebus_attach, NULL, NULL);
106
107static int	ebus_setup_attach_args(struct ebus_softc *, bus_space_tag_t,
108				bus_dma_tag_t, int, struct ebus_attach_args *);
109static void	ebus_destroy_attach_args(struct ebus_attach_args *);
110static int	ebus_print(void *, const char *);
111
112/*
113 * here are our bus space and bus DMA routines.
114 */
115static paddr_t	ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int);
116static int	_ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
117			      vaddr_t, bus_space_handle_t *);
118static void	*ebus_intr_establish(bus_space_tag_t, int, int,
119				     int (*)(void *), void *, void (*)(void));
120
121static bus_dma_tag_t	ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t);
122
123
124/*
125 * Working around PROM bogosity.
126 *
127 * EBus doesn't have official OFW binding.  sparc64 has a de-facto
128 * standard but patching it in in prompatch.c and then decoding it
129 * here would be an overkill for ms-IIep.
130 *
131 * So we assume that all ms-IIep based systems use PCIO chip only in
132 * "motherboard mode" with interrupt lines wired directly to ms-IIep
133 * interrupt inputs.
134 *
135 * Note that this is ineligible for prompatch.c, as we are not
136 * correcting PROM to conform to some established standard, this hack
137 * is tied to this version of ebus driver and as such it's better stay
138 * private to the driver.
139 */
140
141struct msiiep_ebus_intr_wiring {
142	const char *name;	/* PROM node */
143	int line;		/* ms-IIep interrupt input */
144};
145
146static const struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = {
147	{ "su", 0 }, { "8042", 0 }, { "sound", 3 }
148};
149
150static const struct msiiep_ebus_intr_wiring espresso_ebus_intr_wiring[] = {
151	{ "su", 0 }, { "8042", 0 }, { "sound", 3 }, { "parallel", 4 }
152};
153
154
155struct msiiep_known_ebus_wiring {
156	const char *model;
157	const struct msiiep_ebus_intr_wiring *map;
158	int mapsize;
159};
160
161#define MSIIEP_MODEL_WIRING(name, map) \
162	{ name, map, sizeof(map)/sizeof(map[0]) }
163
164static const struct msiiep_known_ebus_wiring known_models[] = {
165	MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring),
166	MSIIEP_MODEL_WIRING("SUNW,375-0059", espresso_ebus_intr_wiring),
167	{ NULL, NULL, 0}
168};
169
170
171/*
172 * XXX: This assumes single EBus.  However I don't think any ms-IIep
173 * system ever used more than one.  In any case, without looking at a
174 * system with multiple PCIO chips I don't know how to correctly
175 * program the driver to handle PROM glitches in them, so for the time
176 * being just use globals.
177 */
178static const struct msiiep_ebus_intr_wiring *wiring_map;
179static int wiring_map_size;
180
181static int ebus_init_wiring_table(struct ebus_softc *);
182
183
184static int
185ebus_match(device_t parent, cfdata_t cf, void *aux)
186{
187	struct pci_attach_args *pa = aux;
188	char name[10];
189	int node;
190
191	/* Only attach if there's a PROM node. */
192	node = PCITAG_NODE(pa->pa_tag);
193	if (node == -1)
194		return (0);
195
196	prom_getpropstringA(node, "name", name, sizeof name);
197	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE
198	    && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN
199	    && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS
200	    && strcmp(name, "ebus") == 0)
201		return (1);
202
203	return (0);
204}
205
206
207static int
208ebus_init_wiring_table(struct ebus_softc *sc)
209{
210	const struct msiiep_known_ebus_wiring *p;
211	char buf[32];
212	char *model;
213
214	if (wiring_map != NULL) {
215		printf("%s: global ebus wiring map already initialized\n",
216		    device_xname(sc->sc_dev));
217		return (0);
218	}
219
220	model = prom_getpropstringA(prom_findroot(), "model",
221				    buf, sizeof(buf));
222	if (model == NULL)
223		panic("ebus_init_wiring_table: no \"model\" property");
224
225	for (p = known_models; p->model != NULL; ++p)
226		if (strcmp(model, p->model) == 0) {
227			wiring_map = p->map;
228			wiring_map_size = p->mapsize;
229			return (1);
230		}
231
232	/* not found?  we should have failed in pci_attach_hook then. */
233	panic("ebus_init_wiring_table: unknown model %s", model);
234}
235
236
237/*
238 * attach an ebus and all its children.  this code is modeled
239 * after the sbus code which does similar things.
240 */
241static void
242ebus_attach(device_t parent, device_t self, void *aux)
243{
244	struct ebus_softc *sc = device_private(self);
245	struct pci_attach_args *pa = aux;
246	struct ebus_attach_args ea;
247	bus_space_tag_t sbt;
248	bus_dma_tag_t dmatag;
249	bus_space_handle_t hLED;
250	pcireg_t base14;
251	int node, error;
252	char devinfo[256];
253
254	sc->sc_dev = self;
255
256#ifdef BLINK
257	callout_init(&ebus_blink_ch, 0);
258#endif
259
260	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
261	printf(": %s, revision 0x%02x\n",
262	       devinfo, PCI_REVISION(pa->pa_class));
263
264	node = PCITAG_NODE(pa->pa_tag);
265	if (node == -1)
266		panic("%s: unable to find ebus node", device_xname(self));
267
268	if (ebus_init_wiring_table(sc) == 0)
269		return;
270
271	/* map the LED register */
272	base14 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14);
273	if (bus_space_map(pa->pa_memt, base14 + 0x726000, 4, 0, &hLED) == 0) {
274		ebus_LED = bus_space_vaddr(pa->pa_memt, hLED);
275#ifdef BLINK
276		ebus_blink((void *)0);
277#endif
278	} else {
279		printf("unable to map the LED register\n");
280	}
281
282	sc->sc_node = node;
283	sc->sc_parent = parent;	/* XXX: unused so far */
284	sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */
285
286	if ((sbt = bus_space_tag_alloc(sc->sc_bustag, sc)) == NULL)
287		panic("unable to allocate ebus bus tag");
288
289	sbt->sparc_bus_map = _ebus_bus_map;
290	sbt->sparc_bus_mmap = ebus_bus_mmap;
291	sbt->sparc_intr_establish = ebus_intr_establish;
292
293	dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat);
294
295	/*
296	 * Setup ranges.  The interesting thing is that we use "reg"
297	 * not "ranges", since "reg" on ebus has exactly the data we'd
298	 * get by processing "ranges".
299	 */
300	error = prom_getprop(node, "reg", sizeof(struct ofw_pci_register),
301			     &sc->sc_nreg, &sc->sc_reg);
302	if (error)
303		panic("%s: unable to read ebus registers (error %d)",
304		    device_xname(self), error);
305
306	/*
307	 * now attach all our children
308	 */
309	DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
310	devhandle_t selfh = device_handle(self);
311	for (node = firstchild(node); node; node = nextsibling(node)) {
312		char *name = prom_getpropstring(node, "name");
313
314		if (ebus_setup_attach_args(sc, sbt, dmatag, node, &ea) != 0) {
315			printf("ebus_attach: %s: incomplete\n", name);
316			continue;
317		}
318		DPRINTF(EDB_CHILD,
319			("- found child `%s', attaching\n", ea.ea_name));
320		(void)config_found(self, &ea, ebus_print,
321		    CFARGS(.devhandle = prom_node_to_devhandle(selfh, node)));
322		ebus_destroy_attach_args(&ea);
323	}
324}
325
326static int
327ebus_setup_attach_args(struct ebus_softc *sc,
328		       bus_space_tag_t bustag, bus_dma_tag_t dmatag, int node,
329		       struct ebus_attach_args	*ea)
330{
331	int n, err;
332
333	memset(ea, 0, sizeof(struct ebus_attach_args));
334
335	err = prom_getprop(node, "name", 1, &n, &ea->ea_name);
336	if (err != 0)
337		return (err);
338	KASSERT(ea->ea_name[n-1] == '\0');
339
340	ea->ea_node = node;
341	ea->ea_bustag = bustag;
342	ea->ea_dmatag = dmatag;
343
344	err = prom_getprop(node, "reg", sizeof(struct ebus_regs),
345			   &ea->ea_nreg, &ea->ea_reg);
346	if (err != 0)
347		return (err);
348
349	/*
350	 * On Ultra the bar is the _offset_ of the BAR in PCI config
351	 * space but in (some?) ms-IIep systems (e.g. Krups) it's the
352	 * _number_ of the BAR - e.g. BAR1 is represented by 1 in
353	 * Krups PROM, while on Ultra it's 0x14.  Fix it here.
354	 */
355	for (n = 0; n < ea->ea_nreg; ++n)
356	    if (ea->ea_reg[n].hi < PCI_MAPREG_START) {
357		ea->ea_reg[n].hi = PCI_MAPREG_START
358		    + ea->ea_reg[n].hi * sizeof(pcireg_t);
359	    }
360
361	err = prom_getprop(node, "address", sizeof(uint32_t),
362			   &ea->ea_nvaddr, &ea->ea_vaddr);
363	if (err != ENOENT) {
364		if (err != 0)
365			return (err);
366
367		if (ea->ea_nreg != ea->ea_nvaddr)
368			printf("ebus loses: device %s: %d regs and %d addrs\n",
369			       ea->ea_name, ea->ea_nreg, ea->ea_nvaddr);
370	} else
371		ea->ea_nvaddr = 0;
372
373	/* XXX: "interrupts" hack */
374	for (n = 0; n < wiring_map_size; ++n) {
375		const struct msiiep_ebus_intr_wiring *w = &wiring_map[n];
376		if (strcmp(w->name, ea->ea_name) == 0) {
377			ea->ea_intr = malloc(sizeof(uint32_t),
378					     M_DEVBUF, M_WAITOK);
379			ea->ea_intr[0] = w->line;
380			ea->ea_nintr = 1;
381			break;
382		}
383	}
384
385	return (0);
386}
387
388static void
389ebus_destroy_attach_args(struct ebus_attach_args *ea)
390{
391
392	if (ea->ea_name)
393		free((void *)ea->ea_name, M_DEVBUF);
394	if (ea->ea_reg)
395		free((void *)ea->ea_reg, M_DEVBUF);
396	if (ea->ea_intr)
397		free((void *)ea->ea_intr, M_DEVBUF);
398	if (ea->ea_vaddr)
399		free((void *)ea->ea_vaddr, M_DEVBUF);
400}
401
402static int
403ebus_print(void *aux, const char *p)
404{
405	struct ebus_attach_args *ea = aux;
406	int i;
407
408	if (p)
409		aprint_normal("%s at %s", ea->ea_name, p);
410	for (i = 0; i < ea->ea_nreg; ++i)
411		aprint_normal("%s bar %x offset 0x%x", i == 0 ? "" : ",",
412		       ea->ea_reg[i].hi, ea->ea_reg[i].lo);
413	for (i = 0; i < ea->ea_nintr; ++i)
414		aprint_normal(" line %d", ea->ea_intr[i]);
415	return (UNCONF);
416}
417
418
419/*
420 * bus space and bus DMA methods below here
421 */
422static bus_dma_tag_t
423ebus_alloc_dma_tag(struct ebus_softc *sc, bus_dma_tag_t pdt)
424{
425	bus_dma_tag_t dt;
426
427	dt = kmem_zalloc(sizeof(*dt), KM_SLEEP);
428	dt->_cookie = sc;
429#define PCOPY(x)	dt->x = pdt->x
430	PCOPY(_dmamap_create);
431	PCOPY(_dmamap_destroy);
432	PCOPY(_dmamap_load);
433	PCOPY(_dmamap_load_mbuf);
434	PCOPY(_dmamap_load_uio);
435	PCOPY(_dmamap_load_raw);
436	PCOPY(_dmamap_unload);
437	PCOPY(_dmamap_sync);
438	PCOPY(_dmamem_alloc);
439	PCOPY(_dmamem_free);
440	PCOPY(_dmamem_map);
441	PCOPY(_dmamem_unmap);
442	PCOPY(_dmamem_mmap);
443#undef	PCOPY
444	return (dt);
445}
446
447/*
448 * bus space support.  <sparc64/dev/psychoreg.h> has a discussion
449 * about PCI physical addresses, which also applies to ebus.
450 */
451static int
452_ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags,
453	      vaddr_t va, bus_space_handle_t *hp)
454{
455	struct ebus_softc *sc = t->cookie;
456	u_int bar;
457	paddr_t offset;
458	int i;
459
460	bar = BUS_ADDR_IOSPACE(ba);
461	offset = BUS_ADDR_PADDR(ba);
462
463	DPRINTF(EDB_BUSMAP,
464		("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n",
465		 (int)bar, (uint32_t)offset, (uint32_t)size,
466		 flags, (void *)va));
467
468	/* EBus has only two BARs */
469	if (PCI_MAPREG_NUM(bar) > 1) {
470		DPRINTF(EDB_BUSMAP,
471			("\n_ebus_bus_map: impossible bar\n"));
472		return (EINVAL);
473	}
474
475	/*
476	 * Almost all of the interesting ebus children are mapped by
477	 * BAR1, the last entry in sc_reg[], so work our way backwards.
478	 */
479	for (i = sc->sc_nreg - 1; i >= 0; --i) {
480		bus_addr_t pciaddr;
481		uint32_t ss;
482
483		/* EBus only does MEM32 */
484		ss  = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK;
485		if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32)
486			continue;
487
488		if (bar != (sc->sc_reg[i].phys_hi
489			    & OFW_PCI_PHYS_HI_REGISTERMASK))
490			continue;
491
492		pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset;
493
494		if (pciaddr + size > sc->sc_reg[i].phys_lo
495					+ sc->sc_reg[i].size_lo)
496			continue;
497
498		DPRINTF(EDB_BUSMAP,
499			("_ebus_bus_map: mapping to PCI addr %x\n",
500			 (uint32_t)pciaddr));
501
502		/* pass it onto the pci controller */
503		return (bus_space_map2(t->parent, pciaddr, size,
504				       flags, va, hp));
505	}
506
507	DPRINTF(EDB_BUSMAP, (": FAILED\n"));
508	return (EINVAL);
509}
510
511static paddr_t
512ebus_bus_mmap(bus_space_tag_t t, bus_addr_t ba, off_t off, int prot, int flags)
513{
514
515	/* XXX: not implemented yet */
516	return (-1);
517}
518
519/*
520 * Install an interrupt handler for a EBus device.
521 */
522static void *
523ebus_intr_establish(bus_space_tag_t t, int pri, int level,
524		    int (*handler)(void *), void *arg,
525		    void (*fastvec)(void))
526{
527
528	return (bus_intr_establish(t->parent, pri, level, handler, arg));
529}
530
531#ifdef BLINK
532
533static void
534ebus_blink(void *zero)
535{
536	register int s;
537
538	s = splhigh();
539	*ebus_LED = ~*ebus_LED;
540	splx(s);
541	/*
542	 * Blink rate is:
543	 *	full cycle every second if completely idle (loadav = 0)
544	 *	full cycle every 2 seconds if loadav = 1
545	 *	full cycle every 3 seconds if loadav = 2
546	 * etc.
547	 */
548	s = (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1));
549	callout_reset(&ebus_blink_ch, s, ebus_blink, NULL);
550}
551#endif
552