1/* $NetBSD: pfcreg.h,v 1.5 2002/03/17 17:55:25 uch Exp $ */ 2 3/*- 4 * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef _SH3_PFCREG_H_ 30#define _SH3_PFCREG_H_ 31#include <sh3/devreg.h> 32 33/* address definitions for pin function controller (PFC)*/ 34 35#define SH3_PCTR 0xffffff76 /* 16bit */ 36#define SH3_PDTR 0xffffff78 /* 8bit */ 37#define SH3_SCSPTR 0xffffff7c /* 8bit */ 38 39/* SH7709, SH7709A */ 40#define SH7709_PACR 0xa4000100 /* 16bit */ 41#define SH7709_PBCR 0xa4000102 /* 16bit */ 42#define SH7709_PCCR 0xa4000104 /* 16bit */ 43#define SH7709_PDCR 0xa4000106 /* 16bit */ 44#define SH7709_PECR 0xa4000108 /* 16bit */ 45#define SH7709_PFCR 0xa400010a /* 16bit */ 46#define SH7709_PGCR 0xa400010c /* 16bit */ 47#define SH7709_PHCR 0xa400010e /* 16bit */ 48#define SH7709_PJCR 0xa4000110 /* 16bit */ 49#define SH7709_PKCR 0xa4000112 /* 16bit */ 50#define SH7709_PLCR 0xa4000114 /* 16bit */ 51#define SH7709_SCPCR 0xa4000116 /* 16bit */ 52#define SH7709_PADR 0xa4000120 /* 8bit */ 53#define SH7709_PBDR 0xa4000122 /* 8bit */ 54#define SH7709_PCDR 0xa4000124 /* 8bit */ 55#define SH7709_PDDR 0xa4000126 /* 8bit */ 56#define SH7709_PEDR 0xa4000128 /* 8bit */ 57#define SH7709_PFDR 0xa400012a /* 8bit */ 58#define SH7709_PGDR 0xa400012c /* 8bit */ 59#define SH7709_PHDR 0xa400012e /* 8bit */ 60#define SH7709_PJDR 0xa4000130 /* 8bit */ 61#define SH7709_PKDR 0xa4000132 /* 8bit */ 62#define SH7709_PLDR 0xa4000134 /* 8bit */ 63#define SH7709_SCPDR 0xa4000136 /* 8bit */ 64 65#define SH4_PCTRA 0xff80002c /* 32bit */ 66#define SH4_PDTRA 0xff800030 /* 16bit */ 67#define SH4_PCTRB 0xff800040 /* 32bit */ 68#define SH4_PDTRB 0xff800044 /* 16bit */ 69#define SH4_GPIOIC 0xff800048 /* 16bit */ 70#define SH4_SCSPTR1 0xffe0001c /* 8bit */ 71#define SH4_SCSPTR2 0xffe80020 /* 16bit */ 72 73#endif /* !_SH3_PFCREG_H_ */ 74 75