pci_machdep_common.c revision 1.17
1/* $NetBSD: pci_machdep_common.c,v 1.17 2013/04/11 18:14:40 macallan Exp $ */ 2 3/*- 4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tim Rightnour 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * Generic PowerPC functions for dealing with a PCI bridge. For most cases, 34 * these functions will work just fine, however, some machines may need 35 * specialized code, so those ports are free to write thier own functions 36 * and call those instead where appropriate. 37 */ 38 39#include <sys/cdefs.h> 40__KERNEL_RCSID(0, "$NetBSD: pci_machdep_common.c,v 1.17 2013/04/11 18:14:40 macallan Exp $"); 41 42#define _POWERPC_BUS_DMA_PRIVATE 43 44#include <sys/param.h> 45#include <sys/bus.h> 46#include <sys/device.h> 47#include <sys/errno.h> 48#include <sys/extent.h> 49#include <sys/intr.h> 50#include <sys/systm.h> 51#include <sys/time.h> 52 53#include <uvm/uvm_extern.h> 54 55#include <dev/pci/pcivar.h> 56#include <dev/pci/pcireg.h> 57#include <dev/pci/pcidevs.h> 58#include <dev/pci/pciconf.h> 59#include <dev/pci/pciidereg.h> 60 61/* 62 * PCI doesn't have any special needs; just use the generic versions 63 * of these functions. 64 */ 65struct powerpc_bus_dma_tag pci_bus_dma_tag = { 66 ._dmamap_create = _bus_dmamap_create, 67 ._dmamap_destroy = _bus_dmamap_destroy, 68 ._dmamap_load = _bus_dmamap_load, 69 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 70 ._dmamap_load_uio = _bus_dmamap_load_uio, 71 ._dmamap_load_raw = _bus_dmamap_load_raw, 72 ._dmamap_unload = _bus_dmamap_unload, 73 74 ._dmamem_alloc = _bus_dmamem_alloc, 75 ._dmamem_free = _bus_dmamem_free, 76 ._dmamem_map = _bus_dmamem_map, 77 ._dmamem_unmap = _bus_dmamem_unmap, 78 ._dmamem_mmap = _bus_dmamem_mmap, 79}; 80 81int 82genppc_pci_bus_maxdevs(void *v, int busno) 83{ 84 return 32; 85} 86 87const char * 88genppc_pci_intr_string(void *v, pci_intr_handle_t ih) 89{ 90 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 91 92#ifdef ICU_LEN 93 if (ih == 0 || ih >= ICU_LEN 94/* XXX on macppc it's completely legal to have PCI interrupts on a slave PIC */ 95#ifdef IRQ_SLAVE 96 || ih == IRQ_SLAVE 97#endif 98 ) 99 panic("pci_intr_string: bogus handle 0x%x", ih); 100#endif 101 102 sprintf(irqstr, "irq %d", ih); 103 return (irqstr); 104 105} 106 107const struct evcnt * 108genppc_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 109{ 110 111 /* XXX for now, no evcnt parent reported */ 112 return NULL; 113} 114 115void * 116genppc_pci_intr_establish(void *v, pci_intr_handle_t ih, int level, 117 int (*func)(void *), void *arg) 118{ 119 120#ifdef ICU_LEN 121 if (ih == 0 || ih >= ICU_LEN 122#ifdef IRQ_SLAVE 123 || ih == IRQ_SLAVE 124#endif 125 ) 126 panic("pci_intr_establish: bogus handle 0x%x", ih); 127#endif 128 129 return intr_establish(ih, IST_LEVEL, level, func, arg); 130} 131 132void 133genppc_pci_intr_disestablish(void *v, void *cookie) 134{ 135 136 intr_disestablish(cookie); 137} 138 139int 140genppc_pci_intr_setattr(void *v, pci_intr_handle_t *ihp, int attr, 141 uint64_t data) 142{ 143 144 return ENODEV; 145} 146 147void 148genppc_pci_conf_interrupt(void *v, int bus, int dev, int pin, 149 int swiz, int *iline) 150{ 151 /* do nothing */ 152} 153 154int 155genppc_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id) 156{ 157 return (PCI_CONF_DEFAULT); 158} 159 160int 161genppc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 162{ 163 int pin = pa->pa_intrpin; 164 int line = pa->pa_intrline; 165 166#ifdef DEBUG 167 printf("%s: pin: %d, line: %d\n", __func__, pin, line); 168#endif 169 170/* 171 * XXX 172 * on my G5 some devices are configured with pin == 0 but a valid IRQ line 173 */ 174#ifndef PMAC_G5 175 if (pin == 0) { 176 /* No IRQ used. */ 177 aprint_error("pci_intr_map: interrupt pin %d\n", pin); 178 goto bad; 179 } 180#endif 181 if (pin > 4) { 182 aprint_error("pci_intr_map: bad interrupt pin %d\n", pin); 183 goto bad; 184 } 185 186 /* 187 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 188 * `unknown' or `no connection' on a PC. We assume that a device with 189 * `no connection' either doesn't have an interrupt (in which case the 190 * pin number should be 0, and would have been noticed above), or 191 * wasn't configured by the BIOS (in which case we punt, since there's 192 * no real way we can know how the interrupt lines are mapped in the 193 * hardware). 194 * 195 * XXX 196 * Since IRQ 0 is only used by the clock, and we can't actually be sure 197 * that the BIOS did its job, we also recognize that as meaning that 198 * the BIOS has not configured the device. 199 */ 200 if (line == 0 || line == 255) { 201 aprint_error("pci_intr_map: no mapping for pin %c\n", '@' + pin); 202 goto bad; 203#ifdef ICU_LEN 204 } else { 205 if (line >= ICU_LEN) { 206 aprint_error("pci_intr_map: bad interrupt line %d\n", line); 207 goto bad; 208 } 209#endif 210 } 211 212 *ihp = line; 213 return 0; 214 215bad: 216 *ihp = -1; 217 return 1; 218} 219 220int 221genppc_pci_msi_request(const struct pci_attach_args *pa, 222 pci_msi_handle_t *msihp, size_t nmsirq, int ipl, int capid) 223{ 224 return EOPNOTSUPP; 225} 226 227int 228genppc_pci_msi_type(void *v, pci_msi_handle_t msih) 229{ 230 panic("%s", __func__); 231} 232 233size_t 234genppc_pci_msi_available(void *v, pci_msi_handle_t msih) 235{ 236 panic("%s", __func__); 237} 238 239const char * 240genppc_pci_msi_string(void *v, pci_msi_handle_t msih, size_t msirq) 241{ 242 panic("%s", __func__); 243} 244 245const struct evcnt * 246genppc_pci_msi_evcnt(void *v, pci_msi_handle_t msih, size_t msirq) 247{ 248 panic("%s", __func__); 249} 250 251void * 252genppc_pci_msi_establish(void *v, pci_msi_handle_t msih, size_t msirq, 253 int ipl, int (*func)(void *), void *arg) 254{ 255 panic("%s", __func__); 256} 257 258void * 259genppc_pci_msix_establish(void *v, pci_msi_handle_t msih, size_t vec, 260 size_t msirq, int ipl, int (*func)(void *), void *arg) 261{ 262 panic("%s", __func__); 263} 264 265void 266genppc_pci_msi_disestablish(void *v, void *ih) 267{ 268 panic("%s", __func__); 269} 270 271void 272genppc_pci_msi_free(void *v, pci_msi_handle_t msih, size_t msirq) 273{ 274 panic("%s", __func__); 275} 276 277void 278genppc_pci_msi_release(void *v, pci_msi_handle_t msih) 279{ 280 panic("%s", __func__); 281} 282 283void 284genppc_pci_chipset_msi_init(pci_chipset_tag_t pc) 285{ 286 pc->pc_msi_request = genppc_pci_msi_request; 287 pc->pc_msi_type = genppc_pci_msi_type; 288 pc->pc_msi_available = genppc_pci_msi_available; 289 pc->pc_msi_evcnt = genppc_pci_msi_evcnt; 290 pc->pc_msi_string = genppc_pci_msi_string; 291 pc->pc_msi_establish = genppc_pci_msi_establish; 292 pc->pc_msix_establish = genppc_pci_msix_establish; 293 pc->pc_msi_disestablish = genppc_pci_msi_disestablish; 294 pc->pc_msi_free = genppc_pci_msi_free; 295 pc->pc_msi_release = genppc_pci_msi_release; 296} 297 298#ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH 299#include <machine/isa_machdep.h> 300#include "isa.h" 301 302void *genppc_pciide_machdep_compat_intr_establish(device_t, 303 struct pci_attach_args *, int, int (*)(void *), void *); 304 305void * 306genppc_pciide_machdep_compat_intr_establish(device_t dev, 307 struct pci_attach_args *pa, int chan, int (*func)(void *), void *arg) 308{ 309#if NISA > 0 310 int irq; 311 void *cookie; 312 313 irq = PCIIDE_COMPAT_IRQ(chan); 314 cookie = isa_intr_establish(NULL, irq, IST_LEVEL, IPL_BIO, func, arg); 315 if (cookie == NULL) 316 return (NULL); 317 aprint_normal_dev(dev, "%s channel interrupting at irq %d\n", 318 PCIIDE_CHANNEL_NAME(chan), irq); 319 return (cookie); 320#else 321 panic("pciide_machdep_compat_intr_establish() called"); 322#endif 323} 324#endif /* __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH */ 325