4xx_trap_subr.S revision 1.6
1272343Sngie/* $NetBSD: 4xx_trap_subr.S,v 1.6 2011/01/18 01:02:53 matt Exp $ */ 2272343Sngie 3272343Sngie/* 4272343Sngie * Copyright 2001 Wasabi Systems, Inc. 5272343Sngie * All rights reserved. 6272343Sngie * 7272343Sngie * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8272343Sngie * 9272343Sngie * Redistribution and use in source and binary forms, with or without 10272343Sngie * modification, are permitted provided that the following conditions 11272343Sngie * are met: 12272343Sngie * 1. Redistributions of source code must retain the above copyright 13272343Sngie * notice, this list of conditions and the following disclaimer. 14272343Sngie * 2. Redistributions in binary form must reproduce the above copyright 15272343Sngie * notice, this list of conditions and the following disclaimer in the 16272343Sngie * documentation and/or other materials provided with the distribution. 17272343Sngie * 3. All advertising materials mentioning features or use of this software 18272343Sngie * must display the following acknowledgement: 19272343Sngie * This product includes software developed for the NetBSD Project by 20272343Sngie * Wasabi Systems, Inc. 21272343Sngie * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22272343Sngie * or promote products derived from this software without specific prior 23272343Sngie * written permission. 24272343Sngie * 25272343Sngie * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26272343Sngie * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27272343Sngie * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28272343Sngie * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29272343Sngie * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30272343Sngie * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31272343Sngie * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32272343Sngie * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33272343Sngie * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34272343Sngie * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35272343Sngie * POSSIBILITY OF SUCH DAMAGE. 36272343Sngie */ 37272343Sngie 38272343Sngie/* This file provides necessary handlers for 405GP CPU 39272343Sngie * It should be included in locore.S after powerpc/powerpc/trap_subr.S 40274626Sngie */ 41272343Sngie 42272979Sngie .text 43272343Sngie .globl _C_LABEL(pitfitwdog),_C_LABEL(pitfitwdogsize) 44272343Sngie 45272343Sngie .align 4 46272343Sngie_C_LABEL(pitfitwdog): 47272343Sngie sync 48272343Sngie ba pitint 49272343Sngie .align 4 50272343Sngie sync 51272343Sngie ba fitint 52272343Sngie .align 4 53272343Sngie sync 54272343Sngie ba wdoghandler 55272343Sngie_C_LABEL(pitfitwdogsize) = .-_C_LABEL(pitfitwdog) 56272343Sngie 57272343Sngiepithandler: 58272343Sngie rfi 59272343Sngie ba . /* Protect against prefetch */ 60272343Sngie 61272343Sngiewdoghandler: 62272343Sngie rfi 63272343Sngie ba . /* Protect against prefetch */ 64272343Sngie 65272343Sngie#define TLBSTK 0x1000 66272343Sngie .lcomm tlbstack,TLBSTK,4 67272343Sngie .type tlbstack,@object 68272343Sngie 69272343Sngie .text 70272343Sngie/* If an unaligned excception (0x600) and DTLB miss exception (0x1100) 71272343Sngie occur at the same time, the interrupt vector offsets of the two 72272343Sngie exceptions are logically OR'ed together to produce 0x1700. 73272343Sngie See PPC405GP Rev D/E Errata item 51 */ 74272343Sngie 75272343Sngie .globl _C_LABEL(errata51handler),_C_LABEL(errata51size) 76272343Sngie_C_LABEL(errata51handler): 77272343Sngie ba 0x1100 78272343Sngie_C_LABEL(errata51size) = .-_C_LABEL(errata51handler) 79272343Sngie 80272343Sngie .globl _C_LABEL(tlbdmiss4xx),_C_LABEL(tlbdm4size) 81272343Sngie_C_LABEL(tlbdmiss4xx): 82272343Sngie ACCESS_PROLOG(CI_TLBMISSSAVE) 83272343Sngie bla s4xx_miss 84272343Sngie_C_LABEL(tlbdm4size) = .-_C_LABEL(tlbdmiss4xx) 85272343Sngie 86272343Sngie .globl _C_LABEL(tlbimiss4xx),_C_LABEL(tlbim4size) 87272343Sngie_C_LABEL(tlbimiss4xx): 88272343Sngie ACCESS_PROLOG(CI_TLBMISSSAVE) 89272343Sngie bla s4xx_miss 90272343Sngie_C_LABEL(tlbim4size) = .-_C_LABEL(tlbimiss4xx) 91272343Sngie 92272343Sngies4xx_miss: 93272343Sngie .globl _C_LABEL(pmap_tlbmiss) 94272343Sngie 95272343Sngie /* If the kernel stack would fault, don't use it. */ 96 mfpid %r30 97 li %r31,KERNEL_PID 98 mtpid %r31 99 li %r31,-FRAMELEN 100 tlbsx. %r31,%r31,%r1 101 mtpid %r30 102 beq 1f 103 104 /* 105 * The kernel stack we want to switch to is not in the TLB. 106 * To solve this problem, we will simulate a kernel 107 * fault on the kernel stack and let the miss handler 108 * bring it in, and return from the trap handler. The 109 * processor will immediately take the original fault, 110 * which we should be able to handle with the now-valid 111 * kernel stack. 112 */ 113 114 /* Switch to tlbstack */ 115 addi %r30,%r1,-FRAMELEN 116 lis %r1,tlbstack+TLBSTK-CALLFRAMELEN@ha 117 addi %r1,%r1,tlbstack+TLBSTK-CALLFRAMELEN@l 118 stw %r30,0(%r1) 119 120 FRAME_SETUP(CI_TLBMISSSAVE) 121 122 /* Take an explicit fault at (kernelstack,pid) */ 123 lwz %r3, FRAMELEN(%r1) 124 li %r4,KERNEL_PID 125 bl _C_LABEL(pmap_tlbmiss) 126 /* 127 * We can retry the old fault or switch stacks and 128 * take it now. It's easier to retry. 129 */ 130 mr. %r3,%r3 131 beq trapexit 132 133 /* kernel stack not in the pmap? we should panic */ 134 trap 135 b trapagain 1361: 137 FRAME_SETUP(CI_TLBMISSSAVE) 138 lwz %r3,FRAME_DEAR(%r1) 139 lwz %r4,FRAME_PID(%r1) 140 bl _C_LABEL(pmap_tlbmiss) 141 mr. %r3,%r3 142 beq trapexit 143 144 /* XXX DEBUG -- make sure we're not on tlbstack */ 145 lis %r3,tlbstack@ha 146 addi %r3,%r3,tlbstack@l 147 sub %r7,%r1,%r3 148 twllei %r7,TLBSTK 149 150 /* PTE not found, time to cause a fault */ 151 b trapagain 152