1/* $NetBSD: bus_defs.h,v 1.2 2019/09/23 16:17:57 skrll Exp $ */
2/*	$OpenBSD: bus.h,v 1.1 1997/10/13 10:53:42 pefo Exp $	*/
3
4/*-
5 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/*
35 * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
36 * Copyright (c) 1996 Jason R. Thorpe.  All rights reserved.
37 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 *    notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 *    notice, this list of conditions and the following disclaimer in the
46 *    documentation and/or other materials provided with the distribution.
47 * 3. All advertising materials mentioning features or use of this software
48 *    must display the following acknowledgement:
49 *      This product includes software developed by Christopher G. Demetriou
50 *	for the NetBSD Project.
51 * 4. The name of the author may not be used to endorse or promote products
52 *    derived from this software without specific prior written permission
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 */
65
66/*
67 * Copyright (c) 1997 Per Fogelstrom.  All rights reserved.
68 * Copyright (c) 1996 Niklas Hallqvist.  All rights reserved.
69 *
70 * Redistribution and use in source and binary forms, with or without
71 * modification, are permitted provided that the following conditions
72 * are met:
73 * 1. Redistributions of source code must retain the above copyright
74 *    notice, this list of conditions and the following disclaimer.
75 * 2. Redistributions in binary form must reproduce the above copyright
76 *    notice, this list of conditions and the following disclaimer in the
77 *    documentation and/or other materials provided with the distribution.
78 * 3. All advertising materials mentioning features or use of this software
79 *    must display the following acknowledgement:
80 *      This product includes software developed by Christopher G. Demetriou
81 *	for the NetBSD Project.
82 * 4. The name of the author may not be used to endorse or promote products
83 *    derived from this software without specific prior written permission
84 *
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
86 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
87 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
89 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
90 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
91 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
92 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
93 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
94 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
95 */
96
97#ifndef _OR1K_BUS_DEFS_H_
98#define _OR1K_BUS_DEFS_H_
99
100/*
101 * Bus access types.
102 */
103typedef uintptr_t bus_addr_t;
104typedef uintptr_t bus_size_t;
105
106#define PRIxBUSADDR	PRIxPTR
107#define PRIxBUSSIZE	PRIxPTR
108#define PRIuBUSSIZE	PRIuPTR
109
110typedef	uintptr_t bus_space_handle_t;
111
112#define PRIxBSH		PRIxPTR
113
114typedef	const struct or1k_bus_space *bus_space_tag_t;
115
116struct extent;
117
118struct or1k_bus_space_scalar {
119	uint8_t (*pbss_read_1)(bus_space_tag_t, bus_space_handle_t,
120	    bus_size_t);
121	uint16_t (*pbss_read_2)(bus_space_tag_t, bus_space_handle_t,
122	    bus_size_t);
123	uint32_t (*pbss_read_4)(bus_space_tag_t, bus_space_handle_t,
124	    bus_size_t);
125	uint64_t (*pbss_read_8)(bus_space_tag_t, bus_space_handle_t,
126	    bus_size_t);
127
128	void (*pbss_write_1)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
129	    uint8_t);
130	void (*pbss_write_2)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
131	    uint16_t);
132	void (*pbss_write_4)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
133	    uint32_t);
134	void (*pbss_write_8)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
135	    uint64_t);
136};
137
138struct or1k_bus_space_group {
139	void (*pbsg_read_1)(bus_space_tag_t, bus_space_handle_t,
140	    bus_size_t, uint8_t *, size_t);
141	void (*pbsg_read_2)(bus_space_tag_t, bus_space_handle_t,
142	    bus_size_t, uint16_t *, size_t);
143	void (*pbsg_read_4)(bus_space_tag_t, bus_space_handle_t,
144	    bus_size_t, uint32_t *, size_t);
145	void (*pbsg_read_8)(bus_space_tag_t, bus_space_handle_t,
146	    bus_size_t, uint64_t *, size_t);
147
148	void (*pbsg_write_1)(bus_space_tag_t, bus_space_handle_t,
149	    bus_size_t, const uint8_t *, size_t);
150	void (*pbsg_write_2)(bus_space_tag_t, bus_space_handle_t,
151	    bus_size_t, const uint16_t *, size_t);
152	void (*pbsg_write_4)(bus_space_tag_t, bus_space_handle_t,
153	    bus_size_t, const uint32_t *, size_t);
154	void (*pbsg_write_8)(bus_space_tag_t, bus_space_handle_t,
155	    bus_size_t, const uint64_t *, size_t);
156};
157
158struct or1k_bus_space_set {
159	void (*pbss_set_1)(bus_space_tag_t, bus_space_handle_t,
160	    bus_size_t, uint8_t, size_t);
161	void (*pbss_set_2)(bus_space_tag_t, bus_space_handle_t,
162	    bus_size_t, uint16_t, size_t);
163	void (*pbss_set_4)(bus_space_tag_t, bus_space_handle_t,
164	    bus_size_t, uint32_t, size_t);
165	void (*pbss_set_8)(bus_space_tag_t, bus_space_handle_t,
166	    bus_size_t, uint64_t, size_t);
167};
168
169struct or1k_bus_space_copy {
170	void (*pbsc_copy_1)(bus_space_tag_t, bus_space_handle_t,
171	    bus_size_t, bus_space_handle_t, bus_size_t, size_t);
172	void (*pbsc_copy_2)(bus_space_tag_t, bus_space_handle_t,
173	    bus_size_t, bus_space_handle_t, bus_size_t, size_t);
174	void (*pbsc_copy_4)(bus_space_tag_t, bus_space_handle_t,
175	    bus_size_t, bus_space_handle_t, bus_size_t, size_t);
176	void (*pbsc_copy_8)(bus_space_tag_t, bus_space_handle_t,
177	    bus_size_t, bus_space_handle_t, bus_size_t, size_t);
178};
179
180struct or1k_bus_space {
181	int pbs_flags;
182#define	_BUS_SPACE_BIG_ENDIAN		0x00000100
183#define	_BUS_SPACE_LITTLE_ENDIAN	0x00000000
184#define	_BUS_SPACE_IO_TYPE		0x00000200
185#define	_BUS_SPACE_MEM_TYPE		0x00000000
186#define _BUS_SPACE_STRIDE_MASK		0x0000001f
187	bus_addr_t pbs_offset;		/* offset to real start */
188	bus_addr_t pbs_base;		/* extent base */
189	bus_addr_t pbs_limit;		/* extent limit */
190	struct extent *pbs_extent;
191
192	paddr_t (*pbs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
193	int (*pbs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
194	    bus_space_handle_t *);
195	void (*pbs_unmap)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
196	int (*pbs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t,
197	    bus_size_t align, bus_size_t, int, bus_addr_t *,
198	    bus_space_handle_t *);
199	void (*pbs_free)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
200	int (*pbs_subregion)(bus_space_tag_t, bus_space_handle_t, bus_size_t,
201	    bus_size_t, bus_space_handle_t *);
202
203	struct or1k_bus_space_scalar pbs_scalar;
204	struct or1k_bus_space_scalar pbs_scalar_stream;
205	const struct or1k_bus_space_group *pbs_multi;
206	const struct or1k_bus_space_group *pbs_multi_stream;
207	const struct or1k_bus_space_group *pbs_region;
208	const struct or1k_bus_space_group *pbs_region_stream;
209	const struct or1k_bus_space_set *pbs_set;
210	const struct or1k_bus_space_set *pbs_set_stream;
211	const struct or1k_bus_space_copy *pbs_copy;
212};
213
214#define _BUS_SPACE_STRIDE(t, o) \
215	((o) << ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK))
216#define _BUS_SPACE_UNSTRIDE(t, o) \
217	((o) >> ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK))
218
219#define BUS_SPACE_MAP_CACHEABLE         0x01
220#define BUS_SPACE_MAP_LINEAR            0x02
221#define	BUS_SPACE_MAP_PREFETCHABLE	0x04
222
223int bus_space_init(struct or1k_bus_space *, const char *, void *, size_t);
224void bus_space_mallocok(void);
225
226/*
227 * Access methods for bus resources
228 */
229
230#define	__BUS_SPACE_HAS_STREAM_METHODS
231
232#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
233#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
234
235#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
236
237/*
238 * Bus DMA methods.
239 */
240
241/*
242 * Flags used in various bus DMA methods.
243 */
244#define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
245#define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
246#define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
247#define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
248#define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
249#define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
250#define	BUS_DMA_BUS2		0x020
251#define	BUS_DMA_BUS3		0x040
252#define	BUS_DMA_BUS4		0x080
253#define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
254#define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
255#define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
256
257#ifndef BUS_DMA_DONTCACHE
258#define	BUS_DMA_DONTCACHE	BUS_DMA_NOCACHE
259#endif
260
261/* Forwards needed by prototypes below. */
262struct proc;
263struct mbuf;
264struct uio;
265
266/*
267 * Operations performed by bus_dmamap_sync().
268 */
269#define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
270#define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
271#define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
272#define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
273
274typedef struct or1k_bus_dma_tag		*bus_dma_tag_t;
275typedef struct or1k_bus_dmamap		*bus_dmamap_t;
276
277#define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
278
279/*
280 *	bus_dma_segment_t
281 *
282 *	Describes a single contiguous DMA transaction.  Values
283 *	are suitable for programming into DMA registers.
284 */
285struct or1k_bus_dma_segment {
286	bus_addr_t	ds_addr;	/* DMA address */
287	bus_size_t	ds_len;		/* length of transfer */
288};
289typedef struct or1k_bus_dma_segment	bus_dma_segment_t;
290
291/*
292 *	bus_dma_tag_t
293 *
294 *	A machine-dependent opaque type describing the implementation of
295 *	DMA for a given bus.
296 */
297
298struct or1k_bus_dma_tag {
299	/*
300	 * The `bounce threshold' is checked while we are loading
301	 * the DMA map.  If the physical address of the segment
302	 * exceeds the threshold, an error will be returned.  The
303	 * caller can then take whatever action is necessary to
304	 * bounce the transfer.  If this value is 0, it will be
305	 * ignored.
306	 */
307	bus_addr_t _bounce_thresh;
308
309	/*
310	 * DMA mapping methods.
311	 */
312	int	(*_dmamap_create) (bus_dma_tag_t, bus_size_t, int,
313		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
314	void	(*_dmamap_destroy) (bus_dma_tag_t, bus_dmamap_t);
315	int	(*_dmamap_load) (bus_dma_tag_t, bus_dmamap_t, void *,
316		    bus_size_t, struct proc *, int);
317	int	(*_dmamap_load_mbuf) (bus_dma_tag_t, bus_dmamap_t,
318		    struct mbuf *, int);
319	int	(*_dmamap_load_uio) (bus_dma_tag_t, bus_dmamap_t,
320		    struct uio *, int);
321	int	(*_dmamap_load_raw) (bus_dma_tag_t, bus_dmamap_t,
322		    bus_dma_segment_t *, int, bus_size_t, int);
323	void	(*_dmamap_unload) (bus_dma_tag_t, bus_dmamap_t);
324	void	(*_dmamap_sync) (bus_dma_tag_t, bus_dmamap_t,
325		    bus_addr_t, bus_size_t, int);
326
327	/*
328	 * DMA memory utility functions.
329	 */
330	int	(*_dmamem_alloc) (bus_dma_tag_t, bus_size_t, bus_size_t,
331		    bus_size_t, bus_dma_segment_t *, int, int *, int);
332	void	(*_dmamem_free) (bus_dma_tag_t,
333		    bus_dma_segment_t *, int);
334	int	(*_dmamem_map) (bus_dma_tag_t, bus_dma_segment_t *,
335		    int, size_t, void **, int);
336	void	(*_dmamem_unmap) (bus_dma_tag_t, void *, size_t);
337	paddr_t	(*_dmamem_mmap) (bus_dma_tag_t, bus_dma_segment_t *,
338		    int, off_t, int, int);
339
340#ifndef PHYS_TO_BUS_MEM
341	bus_addr_t (*_dma_phys_to_bus_mem)(bus_dma_tag_t, bus_addr_t);
342#define	PHYS_TO_BUS_MEM(t, addr) (*(t)->_dma_phys_to_bus_mem)((t), (addr))
343#endif
344#ifndef BUS_MEM_TO_PHYS
345	bus_addr_t (*_dma_bus_mem_to_phys)(bus_dma_tag_t, bus_addr_t);
346#define	BUS_MEM_TO_PHYS(t, addr) (*(t)->_dma_bus_mem_to_phys)((t), (addr))
347#endif
348};
349
350/*
351 *	bus_dmamap_t
352 *
353 *	Describes a DMA mapping.
354 */
355struct or1k_bus_dmamap {
356	/*
357	 * PRIVATE MEMBERS: not for use my machine-independent code.
358	 */
359	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
360	int		_dm_segcnt;	/* number of segs this map can map */
361	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
362	bus_size_t	_dm_boundary;	/* don't cross this */
363	bus_addr_t	_dm_bounce_thresh; /* bounce threshold; see tag */
364	int		_dm_flags;	/* misc. flags */
365
366	void		*_dm_cookie;	/* cookie for bus-specific functions */
367
368	/*
369	 * PUBLIC MEMBERS: these are used by machine-independent code.
370	 */
371	bus_size_t	dm_maxsegsz;	/* largest possible segment */
372	bus_size_t	dm_mapsize;	/* size of the mapping */
373	int		dm_nsegs;	/* # valid segments in mapping */
374	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
375};
376
377#endif /* _OR1K_BUS_DEFS_H_ */
378