adrsmap.h revision 1.1
1/* 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: $Hdr: adrsmap.h,v 4.300 91/06/09 06:34:29 root Rel41 $ SONY 37 * 38 * @(#)adrsmap.h 8.1 (Berkeley) 6/11/93 39 */ 40 41/* 42 * adrsmap.h 43 * 44 * Define all hardware address map. 45 */ 46 47#ifndef __ADRSMAP__ 48#define __ADRSMAP__ 1 49 50#ifdef news3400 51/*---------------------------------------------------------------------- 52 * news3400 53 *----------------------------------------------------------------------*/ 54/* 55 * timer 56 */ 57#define RTC_PORT 0xbff407f8 58#define DATA_PORT 0xbff407f9 59 60#ifdef notdef 61#define EN_ITIMER 0xb8000004 /*XXX:???*/ 62#endif 63 64#define INTEN0 0xbfc80000 65#define INTEN0_PERR 0x80 66#define INTEN0_ABORT 0x40 67#define INTEN0_BERR 0x20 68#define INTEN0_TIMINT 0x10 69#define INTEN0_KBDINT 0x08 70#define INTEN0_MSINT 0x04 71#define INTEN0_CFLT 0x02 72#define INTEN0_CBSY 0x01 73 74#define INTEN1 0xbfc80001 75#define INTEN1_BEEP 0x80 76#define INTEN1_SCC 0x40 77#define INTEN1_LANCE 0x20 78#define INTEN1_DMA 0x10 79#define INTEN1_SLOT1 0x08 80#define INTEN1_SLOT3 0x04 81#define INTEN1_EXT1 0x02 82#define INTEN1_EXT3 0x01 83 84#define INTST0 0xbfc80002 85#define INTST0_PERR 0x80 86#define INTST0_ABORT 0x40 87#define INTST0_BERR 0x00 /* N/A */ 88#define INTST0_TIMINT 0x10 89#define INTST0_KBDINT 0x08 90#define INTST0_MSINT 0x04 91#define INTST0_CFLT 0x02 92#define INTST0_CBSY 0x01 93#define INTST0_PERR_BIT 7 94#define INTST0_ABORT_BIT 6 95#define INTST0_BERR_BIT 5 /* N/A */ 96#define INTST0_TIMINT_BIT 4 97#define INTST0_KBDINT_BIT 3 98#define INTST0_MSINT_BIT 2 99#define INTST0_CFLT_BIT 1 100#define INTST0_CBSY_BIT 0 101 102#define INTST1 0xbfc80003 103#define INTST1_BEEP 0x80 104#define INTST1_SCC 0x40 105#define INTST1_LANCE 0x20 106#define INTST1_DMA 0x10 107#define INTST1_SLOT1 0x08 108#define INTST1_SLOT3 0x04 109#define INTST1_EXT1 0x02 110#define INTST1_EXT3 0x01 111#define INTST1_BEEP_BIT 7 112#define INTST1_SCC_BIT 6 113#define INTST1_LANCE_BIT 5 114#define INTST1_DMA_BIT 4 115#define INTST1_SLOT1_BIT 3 116#define INTST1_SLOT3_BIT 2 117#define INTST1_EXT1_BIT 1 118#define INTST1_EXT3_BIT 0 119 120#define INTCLR0 0xbfc80004 121#define INTCLR0_PERR 0x80 122#define INTCLR0_ABORT 0x40 123#define INTCLR0_BERR 0x20 124#define INTCLR0_TIMINT 0x10 125#define INTCLR0_KBDINT 0x00 /* N/A */ 126#define INTCLR0_MSINT 0x00 /* N/A */ 127#define INTCLR0_CFLT 0x02 128#define INTCLR0_CBSY 0x01 129 130#define INTCLR1 0xbfc80005 131#define INTCLR1_BEEP 0x80 132#define INTCLR1_SCC 0x00 /* N/A */ 133#define INTCLR1_LANCE 0x00 /* N/A */ 134#define INTCLR1_DMA 0x00 /* N/A */ 135#define INTCLR1_SLOT1 0x00 /* N/A */ 136#define INTCLR1_SLOT3 0x00 /* N/A */ 137#define INTCLR1_EXT1 0x00 /* N/A */ 138#define INTCLR1_EXT3 0x00 /* N/A */ 139 140#define ITIMER 0xbfc80006 141#define IOCLOCK 4915200 142 143#define DIP_SWITCH 0xbfe40000 144#define IDROM 0xbfe80000 145 146#define DEBUG_PORT 0xbfcc0003 147#define DP_READ 0x00 148#define DP_WRITE 0xf0 149#define DP_LED0 0x01 150#define DP_LED1 0x02 151#define DP_LED2 0x04 152#define DP_LED3 0x08 153 154 155#define LANCE_PORT 0xbff80000 156#define LANCE_MEMORY 0xbffc0000 157#define ETHER_ID IDROM_PORT 158 159#define LANCE_PORT1 0xb8c30000 /* expansion lance #1 */ 160#define LANCE_MEMORY1 0xb8c20000 161#define ETHER_ID1 0xb8c38000 162 163#define LANCE_PORT2 0xb8c70000 /* expansion lance #2 */ 164#define LANCE_MEMORY2 0xb8c60000 165#define ETHER_ID2 0xb8c78000 166 167#define IDROM_PORT 0xbfe80000 168 169#define SCCPORT0B 0xbfec0000 170#define SCCPORT0A 0xbfec0002 171#define SCCPORT1B 0xb8c40100 172#define SCCPORT1A 0xb8c40102 173#define SCCPORT2B 0xb8c40104 174#define SCCPORT2A 0xb8c40106 175#define SCCPORT3B 0xb8c40110 176#define SCCPORT3A 0xb8c40112 177#define SCCPORT4B 0xb8c40114 178#define SCCPORT4A 0xb8c40116 179 180#define SCC_STATUS0 0xbfcc0002 181#define SCC_STATUS1 0xb8c40108 182#define SCC_STATUS2 0xb8c40118 183 184#define SCCVECT (0x1fcc0007 | MIPS_KSEG1_START) 185#define SCC_RECV 2 186#define SCC_XMIT 0 187#define SCC_CTRL 3 188#define SCC_STAT 1 189#define SCC_INT_MASK 0x6 190 191/*XXX: SHOULD BE FIX*/ 192#define KEYB_DATA 0xbfd00000 /* keyboard data port */ 193#define KEYB_STAT 0xbfd00001 /* keyboard status port */ 194#define KEYB_INTE INTEN0 /* keyboard interrupt enable */ 195#define KEYB_RESET 0xbfd00002 /* keyboard reset port*/ 196#define KEYB_INIT1 0xbfd00003 /* keyboard speed */ 197#define KEYB_INIT2 KEYB_INIT1 /* keyboard clock */ 198#define KEYB_BUZZ 0xbfd40001 /* keyboard buzzer (length) */ 199#define KEYB_BUZZF 0xbfd40000 /* keyboard buzzer frequency */ 200#define MOUSE_DATA 0xbfd00004 /* mouse data port */ 201#define MOUSE_STAT 0xbfd00005 /* mouse status port */ 202#define MOUSE_INTE INTEN0 /* mouse interrupt enable */ 203#define MOUSE_RESET 0xbfd00006 /* mouse reset port */ 204#define MOUSE_INIT1 0xbfd00007 /* mouse speed */ 205#define MOUSE_INIT2 MOUSE_INIT1 /* mouse clock */ 206 207#define RX_MSINTE 0x04 /* Mouse Interrupt Enable */ 208#define RX_KBINTE 0x08 /* Keyboard Intr. Enable */ 209#define RX_MSINT 0x04 /* Mouse Interrupted */ 210#define RX_KBINT 0x08 /* Keyboard Interrupted */ 211#define RX_MSBUF 0x01 /* Mouse data buffer Full */ 212#define RX_KBBUF 0x01 /* Keyboard data Full */ 213#define RX_MSRDY 0x02 /* Mouse data ready */ 214#define RX_KBRDY 0x02 /* Keyboard data ready */ 215/*XXX: SHOULD BE FIX*/ 216 217#define ABEINT_BADDR 0xbfdc0038 218#endif /* news3400 */ 219 220#endif /* !__ADRSMAP__ */ 221