1/*	$NetBSD: rmixl_intr.h,v 1.2 2011/02/20 07:48:37 matt Exp $	*/
2/*-
3 * Copyright (c) 2010 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Cliff Neighbors.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef _MIPS_RMI_RMIXL_INTR_H_
32#define _MIPS_RMI_RMIXL_INTR_H_
33
34#ifdef _KERNEL_OPT
35#include "opt_multiprocessor.h"
36#endif
37
38/*
39 * A 'vector' is bit number in EIRR/EIMR
40 * - non-IRT-based interrupts use vectors 0..31
41 * - IRT-based interrupts use vectors 32..63
42 * - RMIXL_VECTOR_IRT(vec) is used to index into the IRT
43 * - IRT entry n always routes to vector RMIXL_IRT_VECTOR(n)
44 * - only 1 intrhand_t per vector
45 */
46#define	NINTRVECS	64	/* bit width of the EIRR */
47#define	NIRTS		32	/* #entries in the Interrupt Redirection Table */
48
49/*
50 * mapping between IRT index and vector number
51 */
52#define RMIXL_VECTOR_IS_IRT(vec)	((vec) >= 32)
53#define RMIXL_IRT_VECTOR(irt)		((irt) + 32)
54#define RMIXL_VECTOR_IRT(vec)		((vec) - 32)
55
56/*
57 * vectors (0 <= vec < 8)  are CAUSE[8..15] (including softintrs and count/compare)
58 * vectors (8 <= vec < 31) are for other non-IRT based interrupts
59 * we use one for FMN, and each IPI currently gets own vector;
60 * if NIPIS >= (32 - 8 - 1), then redesign so IPIs share vector(s)
61 */
62#if NIPIS >= 23
63# error too many IPIs
64#endif
65#define RMIXL_INTRVEC_IPI	8
66#define RMIXL_INTRVEC_FMN	(RMIXL_INTRVEC_IPI + NIPIS)
67
68typedef enum {
69	RMIXL_TRIG_NONE=0,
70	RMIXL_TRIG_EDGE,
71	RMIXL_TRIG_LEVEL,
72} rmixl_intr_trigger_t;
73
74typedef enum {
75	RMIXL_POLR_NONE=0,
76	RMIXL_POLR_RISING,
77	RMIXL_POLR_HIGH,
78	RMIXL_POLR_FALLING,
79	RMIXL_POLR_LOW,
80} rmixl_intr_polarity_t;
81
82
83/*
84 * iv_list and ref count manage sharing of each vector
85 */
86typedef struct rmixl_intrhand {
87        int (*ih_func)(void *);
88        void *ih_arg;
89        int ih_mpsafe; 			/* true if does not need kernel lock */
90        int ih_vec;			/* vector is bit number in EIRR/EIMR */
91        int ih_ipl; 			/* interrupt priority */
92        int ih_cpumask; 		/* CPUs which may handle this irpt */
93} rmixl_intrhand_t;
94
95/*
96 * stuff exported from rmixl_spl.S
97 */
98extern const struct splsw rmixl_splsw;
99extern uint64_t ipl_eimr_map[];
100
101extern void *rmixl_intr_establish(int, int, int,
102	rmixl_intr_trigger_t, rmixl_intr_polarity_t,
103	int (*)(void *), void *, bool);
104extern void  rmixl_intr_disestablish(void *);
105extern void *rmixl_vec_establish(int, int, int,
106	int (*)(void *), void *, bool);
107extern void  rmixl_vec_disestablish(void *);
108extern const char *rmixl_intr_string(int);
109extern void rmixl_intr_init_cpu(struct cpu_info *);
110extern void rmixl_intr_init_clk(void);
111#ifdef MULTIPROCESSOR
112extern void rmixl_intr_init_ipi(void);
113#endif
114
115#endif	/* _MIPS_RMI_RMIXL_INTR_H_ */
116