1/* $NetBSD: ralink_gpio.h,v 1.3 2016/10/05 15:54:58 ryo Exp $ */ 2/*- 3 * Copyright (c) 2011 CradlePoint Technology, Inc. 4 * All rights reserved. 5 * 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef _RALINK_GPIO_H_ 30#define _RALINK_GPIO_H_ 31 32/* ra_gpio.h -- Ralink 3052 gpio driver public defines */ 33 34/* Board-specific details */ 35 36#if defined(TABLEROCK) || defined(SPOT2) || defined(PUCK) || defined(MOAB) 37 38/* 39 * Enable pins: UART Full, and GPIO0 pins 0-23 40 * Rising edge: three buttons & dock sense 41 * Falling edge: three buttons & dock sense 42 */ 43#define GPIO_TR_PIN_MASK 0x017f81 44#define GPIO_TR_OUTPUT_PIN_MASK 0x003b80 45#define GPIO_TR_INT_PIN_MASK 0x014401 46#define GPIO_TR_INT_FEDGE_PIN_MASK 0x014401 47#define GPIO_TR_POL_MASK 0x000000 48 49/* 50 * Enable pins: RGMII, and SDRAM GPIO pins 24-51 51 * Rising edge: IN_5V, DOCK_SENSE and LAN_WAN_SWITCH 52 * Falling edge: IN_5V, DOCK_SENSE and LAN_WAN_SWITCH 53 */ 54#define GPIO_TR_PIN_MASK_24_51 0x0affff3f 55#define GPIO_TR_OUTPUT_PIN_MASK_24_51 0x00ffff07 56#define GPIO_TR_INT_PIN_MASK_24_51 0x02000010 57#define GPIO_TR_INT_FEDGE_PIN_MASK_24_51 0x02000010 58#define GPIO_TR_POL_MASK_24_51 0x00000000 59 60#define WPS_BUTTON 0 /* input, interrupt */ 61 62/* UARTF Block */ 63#define POWER_EN_3G 7 64#define POWER_EN_WIMAX 8 65#define POWER_ON 9 66#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */ 67#define NC_4 11 68#define USB_SW1 12 69#define USB_SW2 13 70#define POWER_OFF_BUTTON 14 /* input, interrupt */ 71 72/* UARTL Block */ 73#define NC_6 15 74#define DOCK_SENSE 16 /* input, interrupt */ 75 76/* SDRAM block */ 77#define DOCK_5V_ENA 24 78#define USB5V_EN 25 79#define CHARGER_OFF 26 /* 1 : charger on, 0 : charger off */ 80#define PA_OR_PC_IN 27 /* input */ 81#define IN_5V 28 /* input, interrupt */ 82#define CHRGB 29 /* input, NI for P1 board */ 83#define NC_1 30 84#define NC_2 31 85#define LED_BATT_7 32 86#define LED_BATT_8 33 87#define LED_BATT_9 34 88#define LED_BATT_10 35 89#define LED_SS_11 36 90#define LED_SS_12 37 91#define LED_SS_13 38 92#define LED_SS_14 39 93 94/* RGMII block */ 95#define LED_WPS 40 96#define LED_WIFI 41 97#define LED_CHARGE 42 98#define LED_POWER 43 99#define LED_WIMAX 44 100#define LED_3G 45 101#define POWER_ON_LATCH 46 102#define HUB_RST 47 103#define NC_3 48 104#define LAN_WAN_SW 49 /* input, interrupt */ 105#define NC_5 50 106#define PUCK_BATTERY_LOW 51 107 108/* 109 * Debounced pins: 110 * WPS_BUTTON, POWER_OFF_BUTTON, DOCK_SENSE, IN_5V, LAN_WAN_SW 111 */ 112#define DEBOUNCED_PINS 5 113 114#define GPIO_PIN_MASK GPIO_TR_PIN_MASK 115#define GPIO_OUTPUT_PIN_MASK GPIO_TR_OUTPUT_PIN_MASK 116#define GPIO_INT_PIN_MASK GPIO_TR_INT_PIN_MASK 117#define GPIO_INT_FEDGE_PIN_MASK GPIO_TR_INT_FEDGE_PIN_MASK 118#define GPIO_POL_MASK GPIO_TR_POL_MASK 119 120#define GPIO_PIN_MASK_24_51 GPIO_TR_PIN_MASK_24_51 121#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_TR_OUTPUT_PIN_MASK_24_51 122#define GPIO_INT_PIN_MASK_24_51 GPIO_TR_INT_PIN_MASK_24_51 123#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_TR_INT_FEDGE_PIN_MASK_24_51 124#define GPIO_POL_MASK_24_51 GPIO_TR_POL_MASK_24_51 125 126#define GPIO_PIN_MASK_72_95 0 127#define GPIO_OUTPUT_PIN_MASK_72_95 0 128#define GPIO_INT_PIN_MASK_72_95 0 129#define GPIO_INT_FEDGE_PIN_MASK_72_95 0 130#define GPIO_POL_MASK_72_95 0 131 132#endif /* !TABLEROCK */ 133 134#if defined(PEBBLES500) || defined(PEBBLES35) 135 136/* 137 * Enable pins: I2C, UART Full, and GPIO0 pins 0-23 138 * Rising edge: ? 139 * Falling edge: buttons 140 */ 141#define GPIO_PB500_PIN_MASK 0x005d83 142#define GPIO_PB500_OUTPUT_PIN_MASK 0x000083 143#define GPIO_PB500_INT_PIN_MASK 0x005c00 144#define GPIO_PB500_INT_FEDGE_PIN_MASK 0x000500 145#define GPIO_PB500_POL_MASK 0x000000 146 147/* Enable RGMII */ 148#define P3_HARDWARE 149#if defined(P3_HARDWARE) 150#define GPIO_PB500_PIN_MASK_24_51 0x03cafe00 151#define GPIO_PB500_OUTPUT_PIN_MASK_24_51 0x03c8fe00 152#else 153#define GPIO_PB500_PIN_MASK_24_51 0x0fff0000 154#define GPIO_PB500_OUTPUT_PIN_MASK_24_51 0x0ffd0000 155#endif 156#define GPIO_PB500_INT_PIN_MASK_24_51 0x00020000 /* rising edge ints */ 157#define GPIO_PB500_INT_FEDGE_PIN_MASK_24_51 0x00020000 158#define GPIO_PB500_POL_MASK_24_51 0x00000000 159 160/* I2C block */ 161#define POWER_EN_EXCARD1_3_3v 1 162#define POWER_EN_EXCARD1_1_5v 2 163 164/* UARTF Block */ 165#define VBUS_EN 7 166#define WPS_BUTTON 8 /* input, interrupt */ 167#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */ 168#define CURRENT_LIMIT_FLAG1_3_3v 11 /* input, interrupt */ 169#define CURRENT_LIMIT_FLAG_USB1 12 /* input, interrupt */ 170#define CURRENT_LIMIT_FLAG1_1_5v 14 /* input, interrupt */ 171 172/* SDRAM block */ 173#if defined(P3_HARDWARE) 174#define LAN_WAN 33 175#define LED_WIFI 34 176#define LED_WPS 35 177#define LED_USB 36 178#define LED_USB_RED 37 179#if defined(PEBBLES500) 180#define LED_EXP 38 181#define LED_EXP_RED 39 182#endif 183#else /* P3_HARDWARE */ 184#define LED_WPS 45 185#define LED_WIFI 42 186#define LED_USB 40 187#define LED_USB_RED 44 188#if defined(PEBBLES500) 189#define LED_EXP 50 190#define LED_EXP_RED 51 191#endif 192#endif /* P3_HARDWARE */ 193 194/* RGMII block */ 195#define EXCARD_ATTACH 41 /* input, interrupt */ 196#define POWER_EN_USB 43 197#if defined(PEBBLES500) 198#define LED_SS_13 46 199#define LED_SS_12 47 200#define LED_SS_11 48 201#define LED_SS_10 49 202#endif 203 204/* 205 * Debounced Pins: 206 * WPS_BUTTON, SOFT_RST_IN_BUTTON, CURRENT_LIMIT_FLAG_USB, 207 * CURRENT_LIMIT_FLAG3_3, CURRENT_LIMIT_FLAG1_5, EXCARD_ATTACH 208 */ 209#define DEBOUNCED_PINS 6 210 211#define GPIO_PIN_MASK GPIO_PB500_PIN_MASK 212#define GPIO_OUTPUT_PIN_MASK GPIO_PB500_OUTPUT_PIN_MASK 213#define GPIO_INT_PIN_MASK GPIO_PB500_INT_PIN_MASK 214#define GPIO_INT_FEDGE_PIN_MASK GPIO_PB500_INT_FEDGE_PIN_MASK 215#define GPIO_POL_MASK GPIO_PB500_POL_MASK 216 217#define GPIO_PIN_MASK_24_51 GPIO_PB500_PIN_MASK_24_51 218#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_PB500_OUTPUT_PIN_MASK_24_51 219#define GPIO_INT_PIN_MASK_24_51 GPIO_PB500_INT_PIN_MASK_24_51 220#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_PB500_INT_FEDGE_PIN_MASK_24_51 221#define GPIO_POL_MASK_24_51 GPIO_PB500_POL_MASK_24_51 222 223#define GPIO_PIN_MASK_72_95 0 224#define GPIO_OUTPUT_PIN_MASK_72_95 0 225#define GPIO_INT_PIN_MASK_72_95 0 226#define GPIO_INT_FEDGE_PIN_MASK_72_95 0 227#define GPIO_POL_MASK_72_95 0 228 229#endif /* TABLEROCK || SPOT2 || PUCK || MOAB */ 230 231#if defined(SLICKROCK) 232 233/* 234 * Enable: I2C, UART Full, and GPIO0 pins 0-23 235 * Rising edge: buttons, overcurrent, switch 236 * Falling edge: buttons, overcurrent, switch 237 */ 238#define GPIO_SR_PIN_MASK 0x007fcf 239#define GPIO_SR_OUTPUT_PIN_MASK 0x00128d 240#define GPIO_SR_INT_PIN_MASK 0x006d42 241#define GPIO_SR_INT_FEDGE_PIN_MASK 0x006c42 242#define GPIO_SR_POL_MASK 0x000002 243 244/* Enable RGMII */ 245#define GPIO_SR_PIN_MASK_24_51 0x0000387f 246#define GPIO_SR_OUTPUT_PIN_MASK_24_51 0x0000387b 247#define GPIO_SR_INT_PIN_MASK_24_51 0x0004 248#define GPIO_SR_INT_FEDGE_PIN_MASK_24_51 0x0004 249#define GPIO_SR_POL_MASK_24_51 0x00000000 250 251#define GPIO_SR_PIN_MASK_72_95 0x00000fff 252#define GPIO_SR_OUTPUT_PIN_MASK_72_95 0x00000ff7 253#define GPIO_SR_INT_PIN_MASK_72_95 0x0008 254#define GPIO_SR_INT_FEDGE_PIN_MASK_72_95 0x0008 255#define GPIO_SR_POL_MASK_72_95 0x00000000 256 257#define LED_USB2_G 0 258 259/* I2C block */ 260#define WIFI_ENABLE 1 261#define EX2_CPUSB_RST 2 262 263/* SPI block */ 264#define POWER_EN_USB3 3 265#define CURRENT_LIMIT_FLAG_USB3 6 /* input, interrupt */ 266 267/* UARTF Block */ 268#define EX1_CPUSB_RST 7 269#define SS_BUTTON 8 /* input, interrupt */ 270#define POWER_EN_USB1 9 271#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */ 272#define CURRENT_LIMIT_FLAG_USB2 11 /* input, interrupt */ 273#define POWER_EN_USB2 12 274#define CURRENT_LIMIT_FLAG_EX2 13 /* input, interrupt */ 275 /* (pin 76 on P1 boards) */ 276#define CURRENT_LIMIT_FLAG_USB1 14 /* input, interrupt */ 277 278/* GPIO */ 279#define LED_USB1_G 24 280#define LED_USB1_R 25 281#define WPS_BUTTON 26 282#define LED_EX1_R 27 283#define LED_EX2_G 28 284#define LED_EX2_R 29 285#define LED_WIFI_RED 30 286 287/* LNA_PE_Gx */ 288#define LED_USB3_G 35 289#define LED_USB3_R 36 290#define LED_EX1_G 37 291 292/* RGMII2 */ 293#define POWER_EN_EX1 74 294#define CURRENT_LIMIT_FLAG_EX1 75 /* input, interrupt */ 295#define LED_USB2_R 76 296#define POWER_EN_EX2 77 297#define LED_POWER 78 298#define LED_WPS 79 299#define LED_WIFI_BLUE 82 300#define LED_WIFI 83 301 302#define LED_SS_10 73 303#define LED_SS_11 80 304#define LED_SS_12 81 305#define LED_SS_13 72 306 307/* Debounced Pins: 308 * WPS_BUTTON, SOFT_RST_IN_BUTTON, SS_BUTTON 309 * CURRENT_LIMIT_FLAG USB * 3 + EXP * 2 310 */ 311#define DEBOUNCED_PINS 9 312 313#define GPIO_PIN_MASK GPIO_SR_PIN_MASK 314#define GPIO_OUTPUT_PIN_MASK GPIO_SR_OUTPUT_PIN_MASK 315#define GPIO_INT_PIN_MASK GPIO_SR_INT_PIN_MASK 316#define GPIO_INT_FEDGE_PIN_MASK GPIO_SR_INT_FEDGE_PIN_MASK 317#define GPIO_POL_MASK GPIO_SR_POL_MASK 318 319#define GPIO_PIN_MASK_24_51 GPIO_SR_PIN_MASK_24_51 320#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_SR_OUTPUT_PIN_MASK_24_51 321#define GPIO_INT_PIN_MASK_24_51 GPIO_SR_INT_PIN_MASK_24_51 322#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_SR_INT_FEDGE_PIN_MASK_24_51 323#define GPIO_POL_MASK_24_51 GPIO_SR_POL_MASK_24_51 324 325#define GPIO_PIN_MASK_72_95 GPIO_SR_PIN_MASK_72_95 326#define GPIO_OUTPUT_PIN_MASK_72_95 GPIO_SR_OUTPUT_PIN_MASK_72_95 327#define GPIO_INT_PIN_MASK_72_95 GPIO_SR_INT_PIN_MASK_72_95 328#define GPIO_INT_FEDGE_PIN_MASK_72_95 GPIO_SR_INT_FEDGE_PIN_MASK_72_95 329#define GPIO_POL_MASK_72_95 GPIO_SR_POL_MASK_72_95 330 331#endif /* SLICKROCK */ 332 333 334/* Exported functions */ 335extern int ra_gpio_pin_read(void *arg, int pin); 336extern void ra_gpio_pin_write(void *arg, int pin, int value); 337 338/* Kernel Events (platform-neutral) */ 339#define WPS_BUTTON_EVT 1 340#define RESET_BUTTON_EVT 2 341#define POWER_BUTTON_EVT 3 342#define IN_5V_EVT 4 343#if 0 344#define PWR_FLAG_3G_EVT 5 345#endif 346#define DOCK_SENSE_EVT 6 347#define LAN_WAN_SW_EVT 7 348#define WIFI_ENABLE_EVT 8 349#define SS_BUTTON_EVT 9 350#define CURRENT_LIMIT_EVT 10 351#define EXCARD_ATTACH_EVT 11 352 353#endif /* _RALINK_GPIO_H_ */ 354