zs.c revision 1.30
1/*	$NetBSD: zs.c,v 1.30 2005/01/10 16:34:46 chs Exp $	*/
2
3/*
4 * Copyright (c) 1996, 1998 Bill Studenmund
5 * Copyright (c) 1995 Gordon W. Ross
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 *    derived from this software without specific prior written permission.
18 * 4. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *      This product includes software developed by Gordon Ross
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/*
35 * Zilog Z8530 Dual UART driver (machine-dependent part)
36 *
37 * Runs two serial lines per chip using slave drivers.
38 * Plain tty/async lines use the zs_async slave.
39 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40 * Other ports use their own mice & keyboard slaves.
41 *
42 * Credits & history:
43 *
44 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
45 * (port-sun3?) zs.c driver (which was in turn based on code in the
46 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
47 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de
48 * Brouwer field-tested the driver at a local ISP.
49 *
50 * Bill Studenmund and Gordon Ross then ported the machine-independant
51 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
52 * intermediate version (mac68k using a local, patched version of
53 * the m.i. drivers), with NetBSD 1.3 containing a full version.
54 */
55
56#include <sys/cdefs.h>
57__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.30 2005/01/10 16:34:46 chs Exp $");
58
59#include "opt_ddb.h"
60#include "opt_kgdb.h"
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/proc.h>
65#include <sys/device.h>
66#include <sys/conf.h>
67#include <sys/file.h>
68#include <sys/ioctl.h>
69#include <sys/tty.h>
70#include <sys/time.h>
71#include <sys/kernel.h>
72#include <sys/syslog.h>
73#ifdef KGDB
74#include <sys/kgdb.h>
75#endif
76
77#include <dev/cons.h>
78#include <dev/ofw/openfirm.h>
79#include <dev/ic/z8530reg.h>
80
81#include <machine/z8530var.h>
82#include <machine/autoconf.h>
83#include <machine/cpu.h>
84#include <machine/pio.h>
85
86/* Are these in a header file anywhere? */
87/* Booter flags interface */
88#define ZSMAC_RAW	0x01
89#define ZSMAC_LOCALTALK	0x02
90
91#include "zsc.h"	/* get the # of zs chips defined */
92
93/*
94 * Some warts needed by z8530tty.c -
95 */
96int zs_def_cflag = (CREAD | CS8 | HUPCL);
97
98/*
99 * abort detection on console will now timeout after iterating on a loop
100 * the following # of times. Cheep hack. Also, abort detection is turned
101 * off after a timeout (i.e. maybe there's not a terminal hooked up).
102 */
103#define ZSABORT_DELAY 3000000
104
105struct zsdevice {
106	/* Yes, they are backwards. */
107	struct	zschan zs_chan_b;
108	struct	zschan zs_chan_a;
109};
110
111/* Flags from cninit() */
112static int zs_hwflags[NZSC][2];
113/* Default speed for each channel */
114static int zs_defspeed[NZSC][2] = {
115	{ 38400, 	/* tty00 */
116	  38400 },	/* tty01 */
117};
118
119/* console stuff */
120void	*zs_conschan = 0;
121#ifdef	ZS_CONSOLE_ABORT
122int	zs_cons_canabort = 1;
123#else
124int	zs_cons_canabort = 0;
125#endif /* ZS_CONSOLE_ABORT*/
126
127/* device to which the console is attached--if serial. */
128/* Mac stuff */
129
130static int zs_get_speed(struct zs_chanstate *);
131
132/*
133 * Even though zsparam will set up the clock multiples, etc., we
134 * still set them here as: 1) mice & keyboards don't use zsparam,
135 * and 2) the console stuff uses these defaults before device
136 * attach.
137 */
138
139static u_char zs_init_reg[16] = {
140	0,	/* 0: CMD (reset, etc.) */
141	0,	/* 1: No interrupts yet. */
142	0,	/* IVECT */
143	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
144	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
145	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
146	0,	/* 6: TXSYNC/SYNCLO */
147	0,	/* 7: RXSYNC/SYNCHI */
148	0,	/* 8: alias for data port */
149	ZSWR9_MASTER_IE,
150	0,	/*10: Misc. TX/RX control bits */
151	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
152	((PCLK/32)/38400)-2,	/*12: BAUDLO (default=38400) */
153	0,			/*13: BAUDHI (default=38400) */
154	ZSWR14_BAUD_ENA,
155	ZSWR15_BREAK_IE,
156};
157
158/****************************************************************
159 * Autoconfig
160 ****************************************************************/
161
162/* Definition of the driver for autoconfig. */
163static int	zsc_match(struct device *, struct cfdata *, void *);
164static void	zsc_attach(struct device *, struct device *, void *);
165static int	zsc_print(void *, const char *);
166
167CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
168    zsc_match, zsc_attach, NULL, NULL);
169
170extern struct cfdriver zsc_cd;
171
172int zshard(void *);
173int zssoft(void *);
174#ifdef ZS_TXDMA
175static int zs_txdma_int(void *);
176#endif
177
178void zscnprobe(struct consdev *);
179void zscninit(struct consdev *);
180int  zscngetc(dev_t);
181void zscnputc(dev_t, int);
182void zscnpollc(dev_t, int);
183
184/*
185 * Is the zs chip present?
186 */
187static int
188zsc_match(struct device *parent, struct cfdata *cf, void *aux)
189{
190	struct confargs *ca = aux;
191	int unit = cf->cf_unit;
192
193	if (strcmp(ca->ca_name, "escc") != 0)
194		return 0;
195
196	if (unit > 1)
197		return 0;
198
199	return 1;
200}
201
202/*
203 * Attach a found zs.
204 *
205 * Match slave number to zs unit number, so that misconfiguration will
206 * not set up the keyboard as ttya, etc.
207 */
208static void
209zsc_attach(struct device *parent, struct device *self, void *aux)
210{
211	struct zsc_softc *zsc = (void *)self;
212	struct confargs *ca = aux;
213	struct zsc_attach_args zsc_args;
214	volatile struct zschan *zc;
215	struct xzs_chanstate *xcs;
216	struct zs_chanstate *cs;
217	struct zsdevice *zsd;
218	int zsc_unit, channel;
219	int s, chip, theflags;
220	int node, intr[2][3];
221	u_int regs[6];
222
223	chip = 0;
224	zsc_unit = zsc->zsc_dev.dv_unit;
225
226	ca->ca_reg[0] += ca->ca_baseaddr;
227	zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
228
229	node = OF_child(ca->ca_node);	/* ch-a */
230
231	for (channel = 0; channel < 2; channel++) {
232		if (OF_getprop(node, "AAPL,interrupts",
233			       intr[channel], sizeof(intr[0])) == -1 &&
234		    OF_getprop(node, "interrupts",
235			       intr[channel], sizeof(intr[0])) == -1) {
236			printf(": cannot find interrupt property\n");
237			return;
238		}
239
240		if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
241			printf(": cannot find reg property\n");
242			return;
243		}
244		regs[2] += ca->ca_baseaddr;
245		regs[4] += ca->ca_baseaddr;
246#ifdef ZS_TXDMA
247		zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
248		zsc->zsc_txdmacmd[channel] =
249			dbdma_alloc(sizeof(dbdma_command_t) * 3);
250		memset(zsc->zsc_txdmacmd[channel], 0,
251			sizeof(dbdma_command_t) * 3);
252		dbdma_reset(zsc->zsc_txdmareg[channel]);
253#endif
254		node = OF_peer(node);	/* ch-b */
255	}
256
257	printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
258
259	/*
260	 * Initialize software state for each channel.
261	 */
262	for (channel = 0; channel < 2; channel++) {
263		zsc_args.channel = channel;
264		zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
265		xcs = &zsc->xzsc_xcs_store[channel];
266		cs  = &xcs->xzs_cs;
267		zsc->zsc_cs[channel] = cs;
268
269		simple_lock_init(&cs->cs_lock);
270		cs->cs_channel = channel;
271		cs->cs_private = NULL;
272		cs->cs_ops = &zsops_null;
273
274		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
275
276		cs->cs_reg_csr  = &zc->zc_csr;
277		cs->cs_reg_data = &zc->zc_data;
278
279		memcpy(cs->cs_creg, zs_init_reg, 16);
280		memcpy(cs->cs_preg, zs_init_reg, 16);
281
282		/* Current BAUD rate generator clock. */
283		cs->cs_brg_clk = PCLK / 16;	/* RTxC is 230400*16, so use 230400 */
284		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
285			cs->cs_defspeed = zs_get_speed(cs);
286		else
287			cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
288		cs->cs_defcflag = zs_def_cflag;
289
290		/* Make these correspond to cs_defcflag (-crtscts) */
291		cs->cs_rr0_dcd = ZSRR0_DCD;
292		cs->cs_rr0_cts = 0;
293		cs->cs_wr5_dtr = ZSWR5_DTR;
294		cs->cs_wr5_rts = 0;
295
296#ifdef __notyet__
297		cs->cs_slave_type = ZS_SLAVE_NONE;
298#endif
299
300		/* Define BAUD rate stuff. */
301		xcs->cs_clocks[0].clk = PCLK;
302		xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
303		xcs->cs_clocks[1].flags =
304			ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
305		xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
306		xcs->cs_clock_count = 3;
307		if (channel == 0) {
308			theflags = 0; /*mac68k_machine.modem_flags;*/
309			/*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
310			/*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
311			xcs->cs_clocks[1].clk = 0;
312			xcs->cs_clocks[2].clk = 0;
313		} else {
314			theflags = 0; /*mac68k_machine.print_flags;*/
315			xcs->cs_clocks[1].flags = ZSC_VARIABLE;
316			/*
317			 * Yes, we aren't defining ANY clock source enables for the
318			 * printer's DCD clock in. The hardware won't let us
319			 * use it. But a clock will freak out the chip, so we
320			 * let you set it, telling us to bar interrupts on the line.
321			 */
322			/*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
323			/*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
324			xcs->cs_clocks[1].clk = 0;
325			xcs->cs_clocks[2].clk = 0;
326		}
327		if (xcs->cs_clocks[1].clk)
328			zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
329		if (xcs->cs_clocks[2].clk)
330			zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
331
332		/* Set defaults in our "extended" chanstate. */
333		xcs->cs_csource = 0;
334		xcs->cs_psource = 0;
335		xcs->cs_cclk_flag = 0;  /* Nothing fancy by default */
336		xcs->cs_pclk_flag = 0;
337
338		if (theflags & ZSMAC_RAW) {
339			zsc_args.hwflags |= ZS_HWFLAG_RAW;
340			printf(" (raw defaults)");
341		}
342
343		/*
344		 * XXX - This might be better done with a "stub" driver
345		 * (to replace zstty) that ignores LocalTalk for now.
346		 */
347		if (theflags & ZSMAC_LOCALTALK) {
348			printf(" shielding from LocalTalk");
349			cs->cs_defspeed = 1;
350			cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
351			cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
352			zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
353			zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
354			/*
355			 * If we might have LocalTalk, then make sure we have the
356			 * Baud rate low-enough to not do any damage.
357			 */
358		}
359
360		/*
361		 * We used to disable chip interrupts here, but we now
362		 * do that in zscnprobe, just in case MacOS left the chip on.
363		 */
364
365		xcs->cs_chip = chip;
366
367		/* Stash away a copy of the final H/W flags. */
368		xcs->cs_hwflags = zsc_args.hwflags;
369
370		/*
371		 * Look for a child driver for this channel.
372		 * The child attach will setup the hardware.
373		 */
374		if (!config_found(self, (void *)&zsc_args, zsc_print)) {
375			/* No sub-driver.  Just reset it. */
376			u_char reset = (channel == 0) ?
377				ZSWR9_A_RESET : ZSWR9_B_RESET;
378			s = splzs();
379			zs_write_reg(cs, 9, reset);
380			splx(s);
381		}
382	}
383
384	/* XXX - Now safe to install interrupt handlers. */
385	intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
386	intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
387#ifdef ZS_TXDMA
388	intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
389	intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
390#endif
391
392#ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
393	zsc->zsc_si = softintr_establish(IPL_SOFTSERIAL,
394		(void (*)(void *)) zsc_intr_soft, zsc);
395#endif
396
397	/*
398	 * Set the master interrupt enable and interrupt vector.
399	 * (common to both channels, do it on A)
400	 */
401	cs = zsc->zsc_cs[0];
402	s = splzs();
403	/* interrupt vector */
404	zs_write_reg(cs, 2, zs_init_reg[2]);
405	/* master interrupt control (enable) */
406	zs_write_reg(cs, 9, zs_init_reg[9]);
407	splx(s);
408}
409
410static int
411zsc_print(void *aux, const char *name)
412{
413	struct zsc_attach_args *args = aux;
414
415	if (name != NULL)
416		aprint_normal("%s: ", name);
417
418	if (args->channel != -1)
419		aprint_normal(" channel %d", args->channel);
420
421	return UNCONF;
422}
423
424int
425zsmdioctl(struct zs_chanstate *cs, u_long cmd, caddr_t data)
426{
427	switch (cmd) {
428	default:
429		return (EPASSTHROUGH);
430	}
431	return (0);
432}
433
434void
435zsmd_setclock(struct zs_chanstate *cs)
436{
437#ifdef NOTYET
438	struct xzs_chanstate *xcs = (void *)cs;
439
440	if (cs->cs_channel != 0)
441		return;
442
443	/*
444	 * If the new clock has the external bit set, then select the
445	 * external source.
446	 */
447	via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
448#endif
449}
450
451#ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
452static int zssoftpending;
453#endif
454
455/*
456 * Our ZS chips all share a common, autovectored interrupt,
457 * so we have to look at all of them on each interrupt.
458 */
459int
460zshard(void *arg)
461{
462	struct zsc_softc *zsc;
463	int unit, rval;
464
465	rval = 0;
466	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
467		zsc = zsc_cd.cd_devs[unit];
468		if (zsc == NULL)
469			continue;
470		rval |= zsc_intr_hard(zsc);
471		if ((zsc->zsc_cs[0]->cs_softreq) ||
472			(zsc->zsc_cs[1]->cs_softreq))
473		{
474#ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
475			softintr_schedule(zsc->zsc_si);
476#else
477			/* zsc_req_softint(zsc); */
478			/* We are at splzs here, so no need to lock. */
479			if (zssoftpending == 0) {
480				zssoftpending = 1;
481				setsoftserial();
482			}
483#endif
484		}
485	}
486	return (rval);
487}
488
489#ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
490/*
491 * Similar scheme as for zshard (look at all of them)
492 */
493int
494zssoft(void *arg)
495{
496	struct zsc_softc *zsc;
497	int unit;
498
499	/* This is not the only ISR on this IPL. */
500	if (zssoftpending == 0)
501		return (0);
502
503	/*
504	 * The soft intr. bit will be set by zshard only if
505	 * the variable zssoftpending is zero.
506	 */
507	zssoftpending = 0;
508
509	for (unit = 0; unit < zsc_cd.cd_ndevs; ++unit) {
510		zsc = zsc_cd.cd_devs[unit];
511		if (zsc == NULL)
512			continue;
513		(void) zsc_intr_soft(zsc);
514	}
515	return (1);
516}
517#endif
518
519#ifdef ZS_TXDMA
520int
521zs_txdma_int(void *arg)
522{
523	int ch = (int)arg;
524	struct zsc_softc *zsc;
525	struct zs_chanstate *cs;
526	int unit = 0;			/* XXX */
527
528	zsc = zsc_cd.cd_devs[unit];
529	if (zsc == NULL)
530		panic("zs_txdma_int");
531
532	cs = zsc->zsc_cs[ch];
533	zstty_txdma_int(cs);
534
535	if (cs->cs_softreq) {
536#ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
537		softintr_schedule(zsc->zsc_si);
538#else
539		if (zssoftpending == 0) {
540			zssoftpending = 1;
541			setsoftserial();
542		}
543#endif
544	}
545	return 1;
546}
547
548void
549zs_dma_setup(struct zs_chanstate *cs, caddr_t pa, int len)
550{
551	struct zsc_softc *zsc;
552	dbdma_command_t *cmdp;
553	int ch = cs->cs_channel;
554
555	zsc = zsc_cd.cd_devs[ch];
556	cmdp = zsc->zsc_txdmacmd[ch];
557
558	DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
559		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
560	cmdp++;
561	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
562		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
563
564	__asm __volatile("eieio");
565
566	dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
567}
568#endif
569
570/*
571 * Compute the current baud rate given a ZS channel.
572 * XXX Assume internal BRG.
573 */
574int
575zs_get_speed(struct zs_chanstate *cs)
576{
577	int tconst;
578
579	tconst = zs_read_reg(cs, 12);
580	tconst |= zs_read_reg(cs, 13) << 8;
581	return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
582}
583
584#ifndef ZS_TOLERANCE
585#define ZS_TOLERANCE 51
586/* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
587#endif
588
589/*
590 * Search through the signal sources in the channel, and
591 * pick the best one for the baud rate requested. Return
592 * a -1 if not achievable in tolerance. Otherwise return 0
593 * and fill in the values.
594 *
595 * This routine draws inspiration from the Atari port's zs.c
596 * driver in NetBSD 1.1 which did the same type of source switching.
597 * Tolerance code inspired by comspeed routine in isa/com.c.
598 *
599 * By Bill Studenmund, 1996-05-12
600 */
601int
602zs_set_speed(struct zs_chanstate *cs, int bps)
603{
604	struct xzs_chanstate *xcs = (void *) cs;
605	int i, tc, tc0 = 0, tc1, s, sf = 0;
606	int src, rate0, rate1, err, tol;
607
608	if (bps == 0)
609		return (0);
610
611	src = -1;		/* no valid source yet */
612	tol = ZS_TOLERANCE;
613
614	/*
615	 * Step through all the sources and see which one matches
616	 * the best. A source has to match BETTER than tol to be chosen.
617	 * Thus if two sources give the same error, the first one will be
618	 * chosen. Also, allow for the possability that one source might run
619	 * both the BRG and the direct divider (i.e. RTxC).
620	 */
621	for (i = 0; i < xcs->cs_clock_count; i++) {
622		if (xcs->cs_clocks[i].clk <= 0)
623			continue;	/* skip non-existent or bad clocks */
624		if (xcs->cs_clocks[i].flags & ZSC_BRG) {
625			/* check out BRG at /16 */
626			tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
627			if (tc1 >= 0) {
628				rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
629				err = abs(((rate1 - bps)*1000)/bps);
630				if (err < tol) {
631					tol = err;
632					src = i;
633					sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
634					tc0 = tc1;
635					rate0 = rate1;
636				}
637			}
638		}
639		if (xcs->cs_clocks[i].flags & ZSC_DIV) {
640			/*
641			 * Check out either /1, /16, /32, or /64
642			 * Note: for /1, you'd better be using a synchronized
643			 * clock!
644			 */
645			int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
646			int b1 = b0 >> 4, e1 = abs(b1-bps);
647			int b2 = b1 >> 1, e2 = abs(b2-bps);
648			int b3 = b2 >> 1, e3 = abs(b3-bps);
649
650			if (e0 < e1 && e0 < e2 && e0 < e3) {
651				err = e0;
652				rate1 = b0;
653				tc1 = ZSWR4_CLK_X1;
654			} else if (e0 > e1 && e1 < e2  && e1 < e3) {
655				err = e1;
656				rate1 = b1;
657				tc1 = ZSWR4_CLK_X16;
658			} else if (e0 > e2 && e1 > e2 && e2 < e3) {
659				err = e2;
660				rate1 = b2;
661				tc1 = ZSWR4_CLK_X32;
662			} else {
663				err = e3;
664				rate1 = b3;
665				tc1 = ZSWR4_CLK_X64;
666			}
667
668			err = (err * 1000)/bps;
669			if (err < tol) {
670				tol = err;
671				src = i;
672				sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
673				tc0 = tc1;
674				rate0 = rate1;
675			}
676		}
677	}
678#ifdef ZSMACDEBUG
679	zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
680#endif
681	if (src == -1)
682		return (EINVAL); /* no can do */
683
684	/*
685	 * The M.I. layer likes to keep cs_brg_clk current, even though
686	 * we are the only ones who should be touching the BRG's rate.
687	 *
688	 * Note: we are assuming that any ZSC_EXTERN signal source comes in
689	 * on the RTxC pin. Correct for the mac68k obio zsc.
690	 */
691	if (sf & ZSC_EXTERN)
692		cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
693	else
694		cs->cs_brg_clk = PCLK / 16;
695
696	/*
697	 * Now we have a source, so set it up.
698	 */
699	s = splzs();
700	xcs->cs_psource = src;
701	xcs->cs_pclk_flag = sf;
702	bps = rate0;
703	if (sf & ZSC_BRG) {
704		cs->cs_preg[4] = ZSWR4_CLK_X16;
705		cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
706		if (sf & ZSC_PCLK) {
707			cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
708		} else {
709			cs->cs_preg[14] = ZSWR14_BAUD_ENA;
710		}
711		tc = tc0;
712	} else {
713		cs->cs_preg[4] = tc0;
714		if (sf & ZSC_RTXDIV) {
715			cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
716		} else {
717			cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
718		}
719		cs->cs_preg[14]= 0;
720		tc = 0xffff;
721	}
722	/* Set the BAUD rate divisor. */
723	cs->cs_preg[12] = tc;
724	cs->cs_preg[13] = tc >> 8;
725	splx(s);
726
727#ifdef ZSMACDEBUG
728	zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
729	    bps, tc, src, sf);
730	zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
731		cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
732#endif
733
734	cs->cs_preg[5] |= ZSWR5_RTS;	/* Make sure the drivers are on! */
735
736	/* Caller will stuff the pending registers. */
737	return (0);
738}
739
740int
741zs_set_modes(struct zs_chanstate *cs, int cflag)
742{
743	struct xzs_chanstate *xcs = (void*)cs;
744	int s;
745
746	/*
747	 * Make sure we don't enable hfc on a signal line we're ignoring.
748	 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
749	 * this code also effectivly turns off ZSWR15_CTS_IE.
750	 *
751	 * Also, disable DCD interrupts if we've been told to ignore
752	 * the DCD pin. Happens on mac68k because the input line for
753	 * DCD can also be used as a clock input.  (Just set CLOCAL.)
754	 *
755	 * If someone tries to turn an invalid flow mode on, Just Say No
756	 * (Suggested by gwr)
757	 */
758	if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
759		return (EINVAL);
760	if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
761		if (cflag & MDMBUF)
762			return (EINVAL);
763		cflag |= CLOCAL;
764	}
765	if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
766		return (EINVAL);
767
768	/*
769	 * Output hardware flow control on the chip is horrendous:
770	 * if carrier detect drops, the receiver is disabled, and if
771	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
772	 * Therefore, NEVER set the HFC bit, and instead use the
773	 * status interrupt to detect CTS changes.
774	 */
775	s = splzs();
776	if ((cflag & (CLOCAL | MDMBUF)) != 0)
777		cs->cs_rr0_dcd = 0;
778	else
779		cs->cs_rr0_dcd = ZSRR0_DCD;
780	/*
781	 * The mac hardware only has one output, DTR (HSKo in Mac
782	 * parlance). In HFC mode, we use it for the functions
783	 * typically served by RTS and DTR on other ports, so we
784	 * have to fake the upper layer out some.
785	 *
786	 * CRTSCTS we use CTS as an input which tells us when to shut up.
787	 * We make no effort to shut up the other side of the connection.
788	 * DTR is used to hang up the modem.
789	 *
790	 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
791	 * shut up the other side.
792	 */
793	if ((cflag & CRTSCTS) != 0) {
794		cs->cs_wr5_dtr = ZSWR5_DTR;
795		cs->cs_wr5_rts = 0;
796		cs->cs_rr0_cts = ZSRR0_CTS;
797	} else if ((cflag & CDTRCTS) != 0) {
798		cs->cs_wr5_dtr = 0;
799		cs->cs_wr5_rts = ZSWR5_DTR;
800		cs->cs_rr0_cts = ZSRR0_CTS;
801	} else if ((cflag & MDMBUF) != 0) {
802		cs->cs_wr5_dtr = 0;
803		cs->cs_wr5_rts = ZSWR5_DTR;
804		cs->cs_rr0_cts = ZSRR0_DCD;
805	} else {
806		cs->cs_wr5_dtr = ZSWR5_DTR;
807		cs->cs_wr5_rts = 0;
808		cs->cs_rr0_cts = 0;
809	}
810	splx(s);
811
812	/* Caller will stuff the pending registers. */
813	return (0);
814}
815
816
817/*
818 * Read or write the chip with suitable delays.
819 * MacII hardware has the delay built in.
820 * No need for extra delay. :-) However, some clock-chirped
821 * macs, or zsc's on serial add-on boards might need it.
822 */
823#define	ZS_DELAY()
824
825u_char
826zs_read_reg(struct zs_chanstate *cs, u_char reg)
827{
828	u_char val;
829
830	out8(cs->cs_reg_csr, reg);
831	ZS_DELAY();
832	val = in8(cs->cs_reg_csr);
833	ZS_DELAY();
834	return val;
835}
836
837void
838zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
839{
840	out8(cs->cs_reg_csr, reg);
841	ZS_DELAY();
842	out8(cs->cs_reg_csr, val);
843	ZS_DELAY();
844}
845
846u_char
847zs_read_csr(struct zs_chanstate *cs)
848{
849	u_char val;
850
851	val = in8(cs->cs_reg_csr);
852	ZS_DELAY();
853	/* make up for the fact CTS is wired backwards */
854	val ^= ZSRR0_CTS;
855	return val;
856}
857
858void
859zs_write_csr(struct zs_chanstate *cs, u_char val)
860{
861	/* Note, the csr does not write CTS... */
862	out8(cs->cs_reg_csr, val);
863	ZS_DELAY();
864}
865
866u_char
867zs_read_data(struct zs_chanstate *cs)
868{
869	u_char val;
870
871	val = in8(cs->cs_reg_data);
872	ZS_DELAY();
873	return val;
874}
875
876void
877zs_write_data(struct zs_chanstate *cs, u_char val)
878{
879	out8(cs->cs_reg_data, val);
880	ZS_DELAY();
881}
882
883/****************************************************************
884 * Console support functions (powermac specific!)
885 * Note: this code is allowed to know about the layout of
886 * the chip registers, and uses that to keep things simple.
887 * XXX - I think I like the mvme167 code better. -gwr
888 * XXX - Well :-P  :-)  -wrs
889 ****************************************************************/
890
891#define zscnpollc	nullcnpollc
892cons_decl(zs);
893
894static int stdin, stdout;
895
896/*
897 * Console functions.
898 */
899
900/*
901 * zscnprobe is the routine which gets called as the kernel is trying to
902 * figure out where the console should be. Each io driver which might
903 * be the console (as defined in mac68k/conf.c) gets probed. The probe
904 * fills in the consdev structure. Important parts are the device #,
905 * and the console priority. Values are CN_DEAD (don't touch me),
906 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
907 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
908 *
909 * As the mac's a bit different, we do extra work here. We mainly check
910 * to see if we have serial echo going on. Also chould check for default
911 * speeds.
912 */
913
914/*
915 * Polled input char.
916 */
917int
918zs_getc(void *v)
919{
920	volatile struct zschan *zc = v;
921	int s, c, rr0;
922
923	s = splhigh();
924	/* Wait for a character to arrive. */
925	do {
926		rr0 = in8(&zc->zc_csr);
927		ZS_DELAY();
928	} while ((rr0 & ZSRR0_RX_READY) == 0);
929
930	c = in8(&zc->zc_data);
931	ZS_DELAY();
932	splx(s);
933
934	/*
935	 * This is used by the kd driver to read scan codes,
936	 * so don't translate '\r' ==> '\n' here...
937	 */
938	return (c);
939}
940
941/*
942 * Polled output char.
943 */
944void
945zs_putc(void *v, int c)
946{
947	volatile struct zschan *zc = v;
948	int s, rr0;
949	long wait = 0;
950
951	s = splhigh();
952	/* Wait for transmitter to become ready. */
953	do {
954		rr0 = in8(&zc->zc_csr);
955		ZS_DELAY();
956	} while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
957
958	if ((rr0 & ZSRR0_TX_READY) != 0) {
959		out8(&zc->zc_data, c);
960		ZS_DELAY();
961	}
962	splx(s);
963}
964
965
966/*
967 * Polled console input putchar.
968 */
969int
970zscngetc(dev_t dev)
971{
972	volatile struct zschan *zc = zs_conschan;
973	int c;
974
975	if (zc) {
976		c = zs_getc((void *)zc);
977	} else {
978		char ch = 0;
979		OF_read(stdin, &ch, 1);
980		c = ch;
981	}
982	return c;
983}
984
985/*
986 * Polled console output putchar.
987 */
988void
989zscnputc(dev_t dev, int c)
990{
991	volatile struct zschan *zc = zs_conschan;
992
993	if (zc) {
994		zs_putc((void *)zc, c);
995	} else {
996		char ch = c;
997		OF_write(stdout, &ch, 1);
998	}
999}
1000
1001/*
1002 * Handle user request to enter kernel debugger.
1003 */
1004void
1005zs_abort(struct zs_chanstate *cs)
1006{
1007	volatile struct zschan *zc = zs_conschan;
1008	int rr0;
1009	long wait = 0;
1010
1011	if (zs_cons_canabort == 0)
1012		return;
1013
1014	/* Wait for end of break to avoid PROM abort. */
1015	do {
1016		rr0 = in8(&zc->zc_csr);
1017		ZS_DELAY();
1018	} while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
1019
1020	if (wait > ZSABORT_DELAY) {
1021		zs_cons_canabort = 0;
1022	/* If we time out, turn off the abort ability! */
1023	}
1024
1025#if defined(KGDB)
1026	kgdb_connect(1);
1027#elif defined(DDB)
1028	Debugger();
1029#endif
1030}
1031
1032extern int ofccngetc(dev_t);
1033extern void ofccnputc(dev_t, int);
1034
1035struct consdev consdev_zs = {
1036	zscnprobe,
1037	zscninit,
1038	zscngetc,
1039	zscnputc,
1040	zscnpollc,
1041	NULL,
1042};
1043
1044void
1045zscnprobe(struct consdev *cp)
1046{
1047	int chosen, pkg;
1048	int unit = 0;
1049	char name[16];
1050	extern const struct cdevsw zstty_cdevsw;
1051
1052	if ((chosen = OF_finddevice("/chosen")) == -1)
1053		return;
1054
1055	if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
1056		return;
1057	if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
1058		return;
1059
1060	if ((pkg = OF_instance_to_package(stdin)) == -1)
1061		return;
1062
1063	memset(name, 0, sizeof(name));
1064	if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
1065		return;
1066
1067	if (strcmp(name, "serial") != 0)
1068		return;
1069
1070	memset(name, 0, sizeof(name));
1071	if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
1072		return;
1073
1074	if (strcmp(name, "ch-b") == 0)
1075		unit = 1;
1076
1077	cp->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), unit);
1078	cp->cn_pri = CN_REMOTE;
1079}
1080
1081void
1082zscninit(struct consdev *cp)
1083{
1084	int escc, escc_ch, obio, zs_offset;
1085	int ch = 0;
1086	u_int32_t reg[5];
1087	char name[16];
1088
1089	if ((escc_ch = OF_instance_to_package(stdin)) == -1)
1090		return;
1091
1092	memset(name, 0, sizeof(name));
1093	if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
1094		return;
1095
1096	if (strcmp(name, "ch-b") == 0)
1097		ch = 1;
1098
1099	if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
1100		return;
1101	zs_offset = reg[0];
1102
1103	escc = OF_parent(escc_ch);
1104	obio = OF_parent(escc);
1105
1106	if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
1107		return;
1108	zs_conschan = (void *)(reg[2] + zs_offset);
1109
1110	zs_hwflags[0][ch] = ZS_HWFLAG_CONSOLE;
1111}
1112