1/*	$NetBSD: cpi_nubusvar.h,v 1.3 2012/01/31 22:13:20 hauke Exp $	*/
2
3/*-
4 * Copyright (c) 2008 Hauke Fath
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#ifndef CPI_NUBUSVAR_H
28#define CPI_NUBUSVAR_H
29
30/* Where we find the Z8536 CIO in Nubus slot space */
31#define CIO_BASE_OFFSET	0x060010
32
33/* Max. length of card name string */
34#define	CPI_CARD_NAME_LEN 64
35
36/* The CIO lives on the top 8 bit of the 32 bit data bus. */
37enum cio_regs {
38	CIO_PORTC = 0x03,
39	CIO_PORTB = 0x07,
40	CIO_PORTA = 0x0b,
41	CIO_CTRL  = 0x0f
42};
43
44#define CPI_UNIT(c)	(minor(c) & 0x1f)
45
46enum lp_state {
47	LP_INITIAL = 0,		/* device is closed */
48	LP_OPENING,		/* device is about to be opened */
49	LP_OPEN,		/* device is open */
50	LP_BUSY,		/* busy with data output */
51	LP_ASLEEP,		/* waiting for output completion */
52};
53
54/* Bit masks for Centronics status + handshake lines */
55enum hsk_lines {
56	CPI_RESET = 0x01,	/* PB0 */
57	CPI_STROBE = 0x08,	/* PC3 */
58	CPI_BUSY = 0x40,	/* PC0 */
59	CPI_SELECT = 0x20,	/* PB5 */
60	CPI_FAULT = 0x02,	/* PB1 */
61	CPI_PAPER_EMPTY = 0x02,	/* PC1 */
62	CPI_ACK = 0x04		/* PC2 */
63};
64
65/*
66 * The CPI board glue logic divides the 10 MHz Nubus clock by 2, and
67 * feeds it to the 8536 CIO (pin 16). The CIO divides the PCLK clock
68 * by 2 internally before providing it to its counters.
69 */
70#define CPI_CLK_FREQ (10000000 / 4)
71
72/* CPI configuration options - we might grow more */
73enum cpi_cf_flags {
74	CPI_CTC12_IS_TIMECOUNTER = 0x01
75};
76#define CPI_OPTIONS_MASK	(CPI_CTC12_IS_TIMECOUNTER)
77
78struct cpi_softc {
79	nubus_slot		sc_slot;	/* Nubus slot number */
80	char			sc_cardname[CPI_CARD_NAME_LEN];
81
82	bus_addr_t		sc_basepa;	/* base physical address */
83	bus_space_tag_t		sc_bst;
84	bus_space_handle_t	sc_bsh;
85
86	ulong			sc_intcount;	/* Hard interrupts */
87	ulong			sc_bytestoport;	/* Bytes written to port */
88
89        struct callout  	sc_wakeupchan;
90
91#define CPI_BUFSIZE	0x0800
92        char		      	*sc_printbuf;	/* Driver's print buffer */
93        size_t          	sc_bufbytes;	/* # of bytes in buffer */
94        u_char          	*sc_cp;		/* Next byte to send */
95
96        u_char          	sc_lpstate;
97
98	ulong			sc_options;
99
100	struct timecounter	sc_timecounter;
101};
102
103#endif /* CPI_NUBUSVAR_H */
104