1/* $NetBSD: vrc4172pcsreg.h,v 1.2 2022/04/08 10:17:53 andvar Exp $ */ 2 3/* 4 * Copyright (c) 2000 SATO Kazumi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* 29 * Vrc4172 PCS (Programmable Chip Select) Unit Registers. 30 */ 31#define VRC2_EXCSREG_MAX 0x30 32 33#define VRC2_EXCS0SELL 0x00 34#define VRC2_EXCS0SELH 0x02 35#define VRC2_EXCS0MSKL 0x04 36#define VRC2_EXCS0MSKH 0x06 37#define VRC2_EXCS1SELL 0x08 38#define VRC2_EXCS1SELH 0x0a 39#define VRC2_EXCS1MSKL 0x0c 40#define VRC2_EXCS1MSKH 0x0e 41#define VRC2_EXCS2SELL 0x10 42#define VRC2_EXCS2SELH 0x12 43#define VRC2_EXCS2MSKL 0x14 44#define VRC2_EXCS2MSKH 0x16 45#define VRC2_EXCS3SELL 0x18 46#define VRC2_EXCS3SELH 0x1a 47#define VRC2_EXCS3MSKL 0x1c 48#define VRC2_EXCS3MSKH 0x1e 49#define VRC2_EXCS4SELL 0x20 50#define VRC2_EXCS4SELH 0x22 51#define VRC2_EXCS4MSKL 0x24 52#define VRC2_EXCS4MSKH 0x26 53#define VRC2_EXCS5SELL 0x28 54#define VRC2_EXCS5SELH 0x2a 55#define VRC2_EXCS5MSKL 0x2c 56#define VRC2_EXCS5MSKH 0x2e 57 58/* for EXCSnSELL */ 59#define VRC2_EXCSSELLMASK 0xfffe 60/* for EXCSnSELH */ 61#define VRC2_EXCSSELHMASK 0x01ff 62 63/* for EXCSnMSKL */ 64#define VRC2_EXCSENMASK 0x1 65#define VRC2_EXCSEN 0x1 66#define VRC2_EXCSDIS 0x00 67#define VRC2_EXCSMSKLMASK 0xfffe 68/* for EXCSnMSKH */ 69#define VRC2_EXCSMSKHMASK 0x01ff 70/* end */ 71