wzero3_kbd.c revision 1.8
1/* $NetBSD: wzero3_kbd.c,v 1.8 2012/10/27 17:17:52 chs Exp $ */ 2 3/*- 4 * Copyright (C) 2008, 2009, 2010 NONAKA Kimihiro <nonaka@netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__KERNEL_RCSID(0, "$NetBSD: wzero3_kbd.c,v 1.8 2012/10/27 17:17:52 chs Exp $"); 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/device.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36#include <sys/callout.h> 37#include <sys/bus.h> 38 39#include <dev/sysmon/sysmonvar.h> 40#include <dev/sysmon/sysmon_taskq.h> 41 42#include <arm/xscale/pxa2x0cpu.h> 43#include <arm/xscale/pxa2x0var.h> 44#include <arm/xscale/pxa2x0_gpio.h> 45 46#include <machine/bootinfo.h> 47#include <machine/config_hook.h> 48#include <machine/platid.h> 49#include <machine/platid_mask.h> 50 51#include <dev/hpc/hpckbdvar.h> 52 53#include <arch/hpcarm/dev/wzero3_reg.h> 54 55#ifdef DEBUG 56#define DPRINTF(arg) printf arg 57#else 58#define DPRINTF(arg) /* nothing */ 59#endif 60 61#define CSR_READ1(r) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (r)) 62#define CSR_WRITE1(r,v) bus_space_write_1(sc->sc_iot, sc->sc_ioh, (r), (v)) 63#define CSR_READ2(r) bus_space_read_2(sc->sc_iot, sc->sc_ioh, (r)) 64#define CSR_WRITE2(r,v) bus_space_write_2(sc->sc_iot, sc->sc_ioh, (r), (v)) 65#define CSR_READ4(r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (r)) 66#define CSR_WRITE4(r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (r), (v)) 67 68/* register */ 69#define KBDCOL_L (0x00) /* Write */ 70#define KBDCOL_U (0x04) /* Write */ 71#define KBDCHARGE (0x08) /* Write */ 72#define KBDDATA (0x08) /* Read */ 73#define REGMAPSIZE 0x0c 74 75#define KEYWAIT 20 /* us */ 76 77#define WS003SH_NCOLUMN 12 78#define WS003SH_NROW 7 79 80struct wzero3kbd_softc { 81 device_t sc_dev; 82 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 86 int sc_ncolumn; 87 int sc_nrow; 88 uint8_t *sc_okeystat; 89 uint8_t *sc_keystat; 90 91 void *sc_key_ih; 92 void *sc_power_ih; 93 void *sc_reset_ih; 94 95 int sc_key_pin; 96 int sc_power_pin; 97 int sc_reset_pin; 98 99 struct hpckbd_ic_if sc_if; 100 struct hpckbd_if *sc_hpckbd; 101 102 struct sysmon_pswitch sc_smpsw; /* for reset key */ 103 104 int sc_enabled; 105 106 /* polling stuff */ 107 struct callout sc_keyscan_ch; 108 int sc_interval; 109#define KEY_INTERVAL 50 /* ms */ 110 111#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 112 void *sc_test_ih; 113 int sc_test_pin; 114 int sc_nouse_pin; 115 int sc_nouse_pin2; 116 int sc_nouse_pin3; 117 int sc_bit; 118#endif 119}; 120 121static int wzero3kbd_match(device_t, cfdata_t, void *); 122static void wzero3kbd_attach(device_t, device_t, void *); 123 124CFATTACH_DECL_NEW(wzero3kbd, sizeof(struct wzero3kbd_softc), 125 wzero3kbd_match, wzero3kbd_attach, NULL, NULL); 126 127static int wzero3kbd_intr(void *arg); 128#if defined(KEYTEST) 129static int wzero3kbd_intr2(void *arg); 130#endif 131#if defined(KEYTEST3) 132static int wzero3kbd_intr3(void *arg); 133#endif 134static void wzero3kbd_tick(void *arg); 135static int wzero3kbd_power_intr(void *arg); 136static int wzero3kbd_reset_intr(void *arg); 137static int wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif); 138static void wzero3kbd_sysmon_reset_event(void *arg); 139static int wzero3kbd_poll(void *arg); 140static int wzero3kbd_poll1(void *arg); 141 142/* 143 * WS003SH/WS004SH/WS007SH keyscan map 144 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 145row#0: CTRL 1 3 5 6 7 9 0 BS (none) ROTATE CAMERA 146row#1: (none) 2 4 r y 8 i o p (none) VOL- VOL+ 147row#2: TAB q e t g u j k (none) (none) (none) (none) 148row#3: (none) w s f v h m l (none) (none) SHIFT (none) 149row#4: CALL a d c b n . (none) ENTER (none) WIN (none) 150row#5: MAIL z x - SPACE / (none) UP (none) (none) LSOFT FN 151row#6: IE MOJI (none) OK ACTION , LEFT DOWN RIGHT (none) RSOFT (none) 152*/ 153 154/* 155 * WS011SH keyscan map 156 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 157row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 158row#1 (none) (none) (none) R Y (none) I O P (none) (none) (none) 159row#2 Tab Q E T G U J K (none) (none) (none) (none) 160row#3 (none) W S F V H M L (none) (none) Shift (none) 161row#4 (none) A D C B N . (none) Enter (none) (none) (none) 162row#5 (none) Z X - Space / (none) UP (none) (none) (none) Fn 163row#6 (none) MOJI HAN/ZEN OK (none) , LEFT DOWN RIGHT (none) (none) (none) 164*/ 165 166/* 167 * WS020SH keyscan map 168 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 169row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 170row#1 (none) (none) (none) R Y (none) I O P (none) MEDIA (none) 171row#2 Tab Q E T G U J K (none) (none) (none) (none) 172row#3 (none) W S F V H M L (none) (none) LShift (none) 173row#4 (none) A D C B N . (none) Enter (none) RShift (none) 174row#5 (none) Z X - Space / (none) UP (none) DOWN (none) Fn 175row#6 (none) MOJI HAN/ZEN OK (none) , LEFT (none) RIGHT (none) (none) (none) 176*/ 177 178static const struct wzero3kbd_model { 179 platid_mask_t *platid; 180 int key_pin; 181 int power_pin; 182 int reset_pin; 183 int ncolumn; 184 int nrow; 185} wzero3kbd_table[] = { 186 /* WS003SH */ 187 { 188 &platid_mask_MACH_SHARP_WZERO3_WS003SH, 189 -1, /* XXX */ 190 GPIO_WS003SH_POWER_BUTTON, 191 -1, /* None */ 192 WS003SH_NCOLUMN, 193 WS003SH_NROW, 194 }, 195 /* WS004SH */ 196 { 197 &platid_mask_MACH_SHARP_WZERO3_WS004SH, 198 -1, /* XXX */ 199 GPIO_WS003SH_POWER_BUTTON, 200 -1, /* None */ 201 WS003SH_NCOLUMN, 202 WS003SH_NROW, 203 }, 204 /* WS007SH */ 205 { 206 &platid_mask_MACH_SHARP_WZERO3_WS007SH, 207 -1, /* XXX */ 208 GPIO_WS007SH_POWER_BUTTON, 209 GPIO_WS007SH_RESET_BUTTON, 210 WS003SH_NCOLUMN, 211 WS003SH_NROW, 212 }, 213 /* WS011SH */ 214 { 215 &platid_mask_MACH_SHARP_WZERO3_WS011SH, 216 -1, /* XXX */ 217 GPIO_WS011SH_POWER_BUTTON, 218 GPIO_WS011SH_RESET_BUTTON, 219 WS003SH_NCOLUMN, 220 WS003SH_NROW, 221 }, 222 /* WS020SH */ 223 { 224 &platid_mask_MACH_SHARP_WZERO3_WS020SH, 225 -1, /* XXX */ 226 GPIO_WS020SH_POWER_BUTTON, 227 GPIO_WS020SH_RESET_BUTTON, 228 WS003SH_NCOLUMN, 229 WS003SH_NROW, 230 }, 231 232 { NULL, -1, -1, -1, 0, 0, } 233}; 234 235static const struct wzero3kbd_model * 236wzero3kbd_lookup(void) 237{ 238 const struct wzero3kbd_model *model; 239 240 for (model = wzero3kbd_table; model->platid != NULL; model++) { 241 if (platid_match(&platid, model->platid)) { 242 return model; 243 } 244 } 245 return NULL; 246} 247 248static int 249wzero3kbd_match(device_t parent, cfdata_t cf, void *aux) 250{ 251 252 if (strcmp(cf->cf_name, "wzero3kbd") != 0) 253 return 0; 254 if (wzero3kbd_lookup() == NULL) 255 return 0; 256 return 1; 257} 258 259static void 260wzero3kbd_attach(device_t parent, device_t self, void *aux) 261{ 262 struct wzero3kbd_softc *sc = device_private(self); 263 struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux; 264 struct hpckbd_attach_args haa; 265 const struct wzero3kbd_model *model; 266 267 sc->sc_dev = self; 268 269 model = wzero3kbd_lookup(); 270 if (model == NULL) { 271 aprint_error(": unknown model\n"); 272 return; 273 } 274 275 aprint_normal(": keyboard\n"); 276 aprint_naive("\n"); 277 278 sc->sc_key_pin = model->key_pin; 279 sc->sc_power_pin = model->power_pin; 280 sc->sc_reset_pin = model->reset_pin; 281 sc->sc_ncolumn = model->ncolumn; 282 sc->sc_nrow = model->nrow; 283 284 sc->sc_iot = pxa->pxa_iot; 285 if (bus_space_map(sc->sc_iot, PXA2X0_CS2_START, REGMAPSIZE, 0, 286 &sc->sc_ioh)) { 287 aprint_error_dev(self, "couldn't map registers.\n"); 288 return; 289 } 290 291 sc->sc_okeystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF, 292 M_NOWAIT | M_ZERO); 293 sc->sc_keystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF, 294 M_NOWAIT | M_ZERO); 295 if (sc->sc_okeystat == NULL || sc->sc_keystat == NULL) { 296 aprint_error_dev(self, "couldn't alloc memory.\n"); 297 if (sc->sc_okeystat) 298 free(sc->sc_okeystat, M_DEVBUF); 299 if (sc->sc_keystat) 300 free(sc->sc_keystat, M_DEVBUF); 301 return; 302 } 303 304 sc->sc_if.hii_ctx = sc; 305 sc->sc_if.hii_establish = wzero3kbd_input_establish; 306 sc->sc_if.hii_poll = wzero3kbd_poll; 307 308 /* Attach console if not using serial. */ 309 if (!(bootinfo->bi_cnuse & BI_CNUSE_SERIAL)) 310 hpckbd_cnattach(&sc->sc_if); 311 312 /* Install interrupt handler. */ 313 if (sc->sc_key_pin >= 0) { 314 pxa2x0_gpio_set_function(sc->sc_key_pin, GPIO_IN); 315 sc->sc_key_ih = pxa2x0_gpio_intr_establish(sc->sc_key_pin, 316 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr, sc); 317 if (sc->sc_key_ih == NULL) { 318 aprint_error_dev(sc->sc_dev, 319 "couldn't establish key interrupt\n"); 320 } 321 } else { 322 sc->sc_interval = KEY_INTERVAL / (1000 / hz); 323 if (sc->sc_interval < 1) 324 sc->sc_interval = 1; 325 callout_init(&sc->sc_keyscan_ch, 0); 326 callout_reset(&sc->sc_keyscan_ch, sc->sc_interval, 327 wzero3kbd_tick, sc); 328 } 329 330 /* power key */ 331 if (sc->sc_power_pin >= 0) { 332 pxa2x0_gpio_set_function(sc->sc_power_pin, GPIO_IN); 333 sc->sc_power_ih = pxa2x0_gpio_intr_establish( 334 sc->sc_power_pin, IST_EDGE_BOTH, IPL_TTY, 335 wzero3kbd_power_intr, sc); 336 if (sc->sc_power_ih == NULL) { 337 aprint_error_dev(sc->sc_dev, 338 "couldn't establish power key interrupt\n"); 339 } 340 } 341 342 /* reset button */ 343 if (sc->sc_reset_pin >= 0) { 344 pxa2x0_gpio_set_function(sc->sc_reset_pin, GPIO_IN); 345 sc->sc_reset_ih = pxa2x0_gpio_intr_establish( 346 sc->sc_reset_pin, IST_EDGE_BOTH, IPL_TTY, 347 wzero3kbd_reset_intr, sc); 348 if (sc->sc_reset_ih == NULL) { 349 aprint_error_dev(sc->sc_dev, 350 "couldn't establish reset key interrupt\n"); 351 } 352 353 sc->sc_smpsw.smpsw_name = device_xname(self); 354 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_RESET; 355 if (sysmon_pswitch_register(&sc->sc_smpsw) != 0) { 356 aprint_error_dev(sc->sc_dev, 357 "unable to register reset event handler\n"); 358 } 359 } 360 361 /* Attach hpckbd. */ 362 haa.haa_ic = &sc->sc_if; 363 config_found(self, &haa, hpckbd_print); 364 365#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 366 sc->sc_test_ih = NULL; 367 sc->sc_test_pin = -1; 368 sc->sc_nouse_pin = -1; 369 sc->sc_nouse_pin2 = -1; 370 sc->sc_nouse_pin3 = -1; 371 sc->sc_bit = 0x01; 372 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH) 373 || platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) { 374 sc->sc_nouse_pin = GPIO_WS003SH_SD_DETECT; /* SD_DETECT */ 375 sc->sc_nouse_pin2 = 86; /* Vsync? */ 376 sc->sc_nouse_pin3 = 89; /* RESET? */ 377 } 378 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) { 379 sc->sc_nouse_pin = GPIO_WS007SH_SD_DETECT; /* SD_DETECT */ 380 sc->sc_nouse_pin2 = 77; /* Vsync? */ 381 } 382 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) { 383 sc->sc_nouse_pin = GPIO_WS011SH_SD_DETECT; /* SD_DETECT */ 384 sc->sc_nouse_pin2 = 77; /* Vsync? */ 385 } 386 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS020SH)) { 387 sc->sc_nouse_pin = GPIO_WS020SH_SD_DETECT; /* SD_DETECT */ 388 sc->sc_nouse_pin2 = 77; /* Vsync? */ 389 } 390 391#ifdef KEYTEST 392 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 393 if (sc->sc_test_pin != sc->sc_nouse_pin 394 && sc->sc_test_pin != sc->sc_nouse_pin2 395 && sc->sc_test_pin != sc->sc_nouse_pin3 396 && sc->sc_test_pin != sc->sc_key_pin 397 && sc->sc_test_pin != sc->sc_power_pin 398 && sc->sc_test_pin != sc->sc_reset_pin 399 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 400 break; 401 } 402 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 403 printf("GPIO_IN: GPIO pin #%d\n", sc->sc_test_pin); 404 sc->sc_test_ih = pxa2x0_gpio_intr_establish(sc->sc_test_pin, 405 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2, sc); 406 } else { 407 sc->sc_test_pin = -1; 408 } 409#endif 410 411#ifdef KEYTEST3 412 { 413 int i; 414 printf("pin: "); 415 for (i = 0; i < PXA270_GPIO_NPINS; i++) { 416 if (i == sc->sc_nouse_pin 417 || i == sc->sc_nouse_pin2 418 || i == sc->sc_nouse_pin3 419 || i == sc->sc_key_pin 420 || i == sc->sc_power_pin 421 || i == sc->sc_reset_pin) 422 continue; 423 424 printf("%d, ", i); 425 if (GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(i))) { 426 pxa2x0_gpio_intr_establish(i, IST_EDGE_BOTH, 427 IPL_TTY, wzero3kbd_intr3, (void *)(long)i); 428 } 429 } 430 } 431#endif 432 433#ifdef KEYTEST4 434 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 435 if (sc->sc_test_pin != sc->sc_nouse_pin 436 && sc->sc_test_pin != sc->sc_nouse_pin2 437 && sc->sc_test_pin != sc->sc_nouse_pin3 438 && sc->sc_test_pin != sc->sc_key_pin 439 && sc->sc_test_pin != sc->sc_power_pin 440 && sc->sc_test_pin != sc->sc_reset_pin 441 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 442 break; 443 } 444 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 445 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 446 } else { 447 sc->sc_test_pin = -1; 448 } 449#endif 450#ifdef KEYTEST5 451 sc->sc_test_pin = 0x00; 452 sc->sc_bit = 0x01; 453#endif 454#endif 455} 456 457static int 458wzero3kbd_intr(void *arg) 459{ 460 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 461 462#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 463 printf("wzero3kbd_intr: GPIO pin #%d = %s\n", sc->sc_key_pin, 464 pxa2x0_gpio_get_bit(sc->sc_key_pin) ? "on" : "off"); 465#endif 466 467#if defined(KEYTEST4) 468 if (sc->sc_test_pin >= 0) { 469 if (pxa2x0_gpio_get_bit(sc->sc_test_pin)) { 470 printf("GPIO_OUT: GPIO pin #%d: L\n",sc->sc_test_pin); 471 pxa2x0_gpio_clear_bit(sc->sc_test_pin); 472 } else { 473 printf("GPIO_OUT: GPIO pin #%d: H\n", sc->sc_test_pin); 474 pxa2x0_gpio_set_bit(sc->sc_test_pin); 475 } 476 } 477#endif 478#if defined(KEYTEST5) 479 printf("CPLD(%#x): value=%#x, mask=%#x\n", 480 sc->sc_test_pin, CSR_READ4(sc->sc_test_pin), sc->sc_bit); 481 if (CSR_READ4(sc->sc_test_pin) & sc->sc_bit) { 482 printf("CPLD_OUT: CPLD: L\n"); 483 CSR_WRITE4(sc->sc_test_pin, 484 CSR_READ4(sc->sc_test_pin) & ~sc->sc_bit); 485 } else { 486 printf("CPLD_OUT: CPLD: H\n"); 487 CSR_WRITE4(sc->sc_test_pin, 488 CSR_READ4(sc->sc_test_pin) | sc->sc_bit); 489 } 490#endif 491 492 (void) wzero3kbd_poll1(sc); 493 494 pxa2x0_gpio_clear_intr(sc->sc_key_pin); 495 496 return 1; 497} 498 499#if defined(KEYTEST) 500static int 501wzero3kbd_intr2(void *arg) 502{ 503 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 504 505 printf("wzero3kbd_intr2: GPIO_IN: GPIO pin #%d = %s\n", sc->sc_test_pin, 506 pxa2x0_gpio_get_bit(sc->sc_test_pin) ? "on" : "off"); 507 508 return 1; 509} 510#endif 511 512#if defined(KEYTEST3) 513static int 514wzero3kbd_intr3(void *arg) 515{ 516 int pin = (int)arg; 517 518 printf("wzero3kbd_intr3: GPIO pin #%d = %s\n", pin, 519 pxa2x0_gpio_get_bit(pin) ? "on" : "off"); 520 521 return 1; 522} 523#endif 524 525 526static void 527wzero3kbd_tick(void *arg) 528{ 529 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 530 531 (void) wzero3kbd_poll1(sc); 532 533 callout_schedule(&sc->sc_keyscan_ch, sc->sc_interval); 534} 535 536static int 537wzero3kbd_power_intr(void *arg) 538{ 539 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 540 541#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) 542 printf("wzero3kbd_power_intr: status = %s\n", 543 pxa2x0_gpio_get_bit(sc->sc_power_pin) ? "on" : "off"); 544#endif 545 546#if defined(KEYTEST) 547 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 548 if (sc->sc_test_pin >= 0) { 549 int orig_pin = sc->sc_test_pin; 550 pxa2x0_gpio_intr_disestablish(sc->sc_test_ih); 551 sc->sc_test_ih = NULL; 552 553 for (;;) { 554 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 555 sc->sc_test_pin = 2; 556 if (sc->sc_test_pin == orig_pin) 557 break; 558 if (sc->sc_test_pin != sc->sc_nouse_pin 559 && sc->sc_test_pin != sc->sc_nouse_pin2 560 && sc->sc_test_pin != sc->sc_nouse_pin3 561 && sc->sc_test_pin != sc->sc_key_pin 562 && sc->sc_test_pin != sc->sc_power_pin 563 && sc->sc_test_pin != sc->sc_reset_pin 564 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 565 break; 566 } 567 if (sc->sc_test_pin != orig_pin) { 568 printf("GPIO_IN: GPIO pin #%d\n", 569 sc->sc_test_pin); 570 sc->sc_test_ih = 571 pxa2x0_gpio_intr_establish(sc->sc_test_pin, 572 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2,sc); 573 } else { 574 sc->sc_test_pin = -1; 575 } 576 } 577 } 578#endif 579 580#if defined(KEYTEST2) 581 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 582 sc->sc_enabled ^= 2; 583 if (sc->sc_enabled & 2) { 584 printf("print col/row\n"); 585 } else { 586 printf("keyscan\n"); 587 } 588 } 589#endif 590#if defined(KEYTEST4) 591 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 592 if (sc->sc_test_pin >= 0) { 593 int orig_pin = sc->sc_test_pin; 594 for (;;) { 595 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 596 sc->sc_test_pin = 2; 597 if (sc->sc_test_pin == orig_pin) 598 break; 599 if (sc->sc_test_pin != sc->sc_nouse_pin 600 && sc->sc_test_pin != sc->sc_nouse_pin2 601 && sc->sc_test_pin != sc->sc_nouse_pin3 602 && sc->sc_test_pin != sc->sc_key_pin 603 && sc->sc_test_pin != sc->sc_power_pin 604 && sc->sc_test_pin != sc->sc_reset_pin 605 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 606 break; 607 } 608 if (sc->sc_test_pin != orig_pin) { 609 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 610 } else { 611 sc->sc_test_pin = -1; 612 } 613 } 614 } 615#endif 616#if defined(KEYTEST5) 617 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 618 sc->sc_bit <<= 1; 619 if (sc->sc_bit & ~0xff) { 620 sc->sc_bit = 0x01; 621 sc->sc_test_pin += 0x4; 622 if (sc->sc_test_pin >= 0x20) { 623 sc->sc_test_pin = 0x00; 624 } 625 } 626 printf("CPLD(%#x), mask=%#x\n", sc->sc_test_pin, sc->sc_bit); 627 } 628#endif 629 630 pxa2x0_gpio_clear_intr(sc->sc_power_pin); 631 632 return 1; 633} 634 635static int 636wzero3kbd_reset_intr(void *arg) 637{ 638 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 639 640 sysmon_task_queue_sched(0, wzero3kbd_sysmon_reset_event, sc); 641 642 pxa2x0_gpio_clear_intr(sc->sc_reset_pin); 643 644 return 1; 645} 646 647static int 648wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif) 649{ 650 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 651 652 /* Save hpckbd interface. */ 653 sc->sc_hpckbd = kbdif; 654 sc->sc_enabled = 1; 655 656 return 0; 657} 658 659static void 660wzero3kbd_sysmon_reset_event(void *arg) 661{ 662 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 663 664 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 665} 666 667static int 668wzero3kbd_poll(void *arg) 669{ 670 int keydown; 671 672 keydown = wzero3kbd_poll1(arg); 673 674 return keydown; 675} 676 677static int 678wzero3kbd_poll1(void *arg) 679{ 680 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 681 int row, col, data; 682 int keycol; 683 int keydown; 684 int i; 685 int s; 686 687 if (!sc->sc_enabled) { 688 DPRINTF(("wzero3kbd_poll: disabled\n")); 689 return 0; 690 } 691 692 s = spltty(); 693 694 for (col = 0; col < sc->sc_ncolumn; col++) { 695 /* deselect column# and charge */ 696 CSR_WRITE1(KBDCOL_L, 0); 697 CSR_WRITE1(KBDCOL_U, 0); 698 CSR_WRITE1(KBDCHARGE, 1); 699 delay(KEYWAIT); 700 CSR_WRITE1(KBDCHARGE, 0); 701 702 /* select scan column# */ 703 keycol = 1 << col; 704 CSR_WRITE1(KBDCOL_L, keycol & 0xff); 705 CSR_WRITE1(KBDCOL_U, keycol >> 8); 706 delay(KEYWAIT); 707 CSR_WRITE1(KBDCHARGE, 0); 708 709 /* read key data */ 710 data = CSR_READ1(KBDDATA); 711 for (row = 0; row < sc->sc_nrow; row++) { 712#ifdef KEYTEST2 713 if (!(sc->sc_enabled & 2)) { 714#endif 715 sc->sc_keystat[row + col * sc->sc_nrow] = 716 (data >> row) & 1; 717#ifdef KEYTEST2 718 } else if (data & (1 << row)) { 719 printf("col = %d, row = %d, idx = %d, data = 0x%02x\n", col, row, row + col * sc->sc_nrow, data); 720 } 721#endif 722 } 723 } 724 725 /* deselect column# and charge */ 726 CSR_WRITE1(KBDCOL_L, 0); 727 CSR_WRITE1(KBDCOL_U, 0); 728 CSR_WRITE1(KBDCHARGE, 1); 729 delay(KEYWAIT); 730 CSR_WRITE1(KBDCHARGE, 0); 731 732 /* send key scan code */ 733 keydown = 0; 734 for (i = 0; i < sc->sc_nrow * sc->sc_ncolumn; i++) { 735 if (sc->sc_keystat[i] == sc->sc_okeystat[i]) 736 continue; 737 738 keydown |= sc->sc_keystat[i]; 739 hpckbd_input(sc->sc_hpckbd, sc->sc_keystat[i], i); 740 sc->sc_okeystat[i] = sc->sc_keystat[i]; 741 } 742 743 splx(s); 744 745 return keydown; 746} 747