wzero3_kbd.c revision 1.10
1/* $NetBSD: wzero3_kbd.c,v 1.10 2020/11/21 21:25:33 thorpej Exp $ */ 2 3/*- 4 * Copyright (C) 2008, 2009, 2010 NONAKA Kimihiro <nonaka@netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__KERNEL_RCSID(0, "$NetBSD: wzero3_kbd.c,v 1.10 2020/11/21 21:25:33 thorpej Exp $"); 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/device.h> 34#include <sys/kernel.h> 35#include <sys/kmem.h> 36#include <sys/callout.h> 37#include <sys/bus.h> 38 39#include <dev/sysmon/sysmonvar.h> 40#include <dev/sysmon/sysmon_taskq.h> 41 42#include <arm/xscale/pxa2x0cpu.h> 43#include <arm/xscale/pxa2x0var.h> 44#include <arm/xscale/pxa2x0_gpio.h> 45 46#include <machine/bootinfo.h> 47#include <machine/config_hook.h> 48#include <machine/platid.h> 49#include <machine/platid_mask.h> 50 51#include <dev/hpc/hpckbdvar.h> 52 53#include <arch/hpcarm/dev/wzero3_reg.h> 54 55#ifdef DEBUG 56#define DPRINTF(arg) printf arg 57#else 58#define DPRINTF(arg) /* nothing */ 59#endif 60 61#define CSR_READ1(r) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (r)) 62#define CSR_WRITE1(r,v) bus_space_write_1(sc->sc_iot, sc->sc_ioh, (r), (v)) 63#define CSR_READ2(r) bus_space_read_2(sc->sc_iot, sc->sc_ioh, (r)) 64#define CSR_WRITE2(r,v) bus_space_write_2(sc->sc_iot, sc->sc_ioh, (r), (v)) 65#define CSR_READ4(r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (r)) 66#define CSR_WRITE4(r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (r), (v)) 67 68/* register */ 69#define KBDCOL_L (0x00) /* Write */ 70#define KBDCOL_U (0x04) /* Write */ 71#define KBDCHARGE (0x08) /* Write */ 72#define KBDDATA (0x08) /* Read */ 73#define REGMAPSIZE 0x0c 74 75#define KEYWAIT 20 /* us */ 76 77#define WS003SH_NCOLUMN 12 78#define WS003SH_NROW 7 79 80struct wzero3kbd_softc { 81 device_t sc_dev; 82 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 86 int sc_ncolumn; 87 int sc_nrow; 88 uint8_t *sc_okeystat; 89 uint8_t *sc_keystat; 90 91 void *sc_key_ih; 92 void *sc_power_ih; 93 void *sc_reset_ih; 94 95 int sc_key_pin; 96 int sc_power_pin; 97 int sc_reset_pin; 98 99 struct hpckbd_ic_if sc_if; 100 struct hpckbd_if *sc_hpckbd; 101 102 struct sysmon_pswitch sc_smpsw; /* for reset key */ 103 104 int sc_enabled; 105 106 /* polling stuff */ 107 struct callout sc_keyscan_ch; 108 int sc_interval; 109#define KEY_INTERVAL 50 /* ms */ 110 111#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 112 void *sc_test_ih; 113 int sc_test_pin; 114 int sc_nouse_pin; 115 int sc_nouse_pin2; 116 int sc_nouse_pin3; 117 int sc_bit; 118#endif 119}; 120 121static int wzero3kbd_match(device_t, cfdata_t, void *); 122static void wzero3kbd_attach(device_t, device_t, void *); 123 124CFATTACH_DECL_NEW(wzero3kbd, sizeof(struct wzero3kbd_softc), 125 wzero3kbd_match, wzero3kbd_attach, NULL, NULL); 126 127static int wzero3kbd_intr(void *arg); 128#if defined(KEYTEST) 129static int wzero3kbd_intr2(void *arg); 130#endif 131#if defined(KEYTEST3) 132static int wzero3kbd_intr3(void *arg); 133#endif 134static void wzero3kbd_tick(void *arg); 135static int wzero3kbd_power_intr(void *arg); 136static int wzero3kbd_reset_intr(void *arg); 137static int wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif); 138static void wzero3kbd_sysmon_reset_event(void *arg); 139static int wzero3kbd_poll(void *arg); 140static int wzero3kbd_poll1(void *arg); 141 142/* 143 * WS003SH/WS004SH/WS007SH keyscan map 144 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 145row#0: CTRL 1 3 5 6 7 9 0 BS (none) ROTATE CAMERA 146row#1: (none) 2 4 r y 8 i o p (none) VOL- VOL+ 147row#2: TAB q e t g u j k (none) (none) (none) (none) 148row#3: (none) w s f v h m l (none) (none) SHIFT (none) 149row#4: CALL a d c b n . (none) ENTER (none) WIN (none) 150row#5: MAIL z x - SPACE / (none) UP (none) (none) LSOFT FN 151row#6: IE MOJI (none) OK ACTION , LEFT DOWN RIGHT (none) RSOFT (none) 152*/ 153 154/* 155 * WS011SH keyscan map 156 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 157row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 158row#1 (none) (none) (none) R Y (none) I O P (none) (none) (none) 159row#2 Tab Q E T G U J K (none) (none) (none) (none) 160row#3 (none) W S F V H M L (none) (none) Shift (none) 161row#4 (none) A D C B N . (none) Enter (none) (none) (none) 162row#5 (none) Z X - Space / (none) UP (none) (none) (none) Fn 163row#6 (none) MOJI HAN/ZEN OK (none) , LEFT DOWN RIGHT (none) (none) (none) 164*/ 165 166/* 167 * WS020SH keyscan map 168 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 169row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 170row#1 (none) (none) (none) R Y (none) I O P (none) MEDIA (none) 171row#2 Tab Q E T G U J K (none) (none) (none) (none) 172row#3 (none) W S F V H M L (none) (none) LShift (none) 173row#4 (none) A D C B N . (none) Enter (none) RShift (none) 174row#5 (none) Z X - Space / (none) UP (none) DOWN (none) Fn 175row#6 (none) MOJI HAN/ZEN OK (none) , LEFT (none) RIGHT (none) (none) (none) 176*/ 177 178static const struct wzero3kbd_model { 179 platid_mask_t *platid; 180 int key_pin; 181 int power_pin; 182 int reset_pin; 183 int ncolumn; 184 int nrow; 185} wzero3kbd_table[] = { 186 /* WS003SH */ 187 { 188 &platid_mask_MACH_SHARP_WZERO3_WS003SH, 189 -1, /* XXX */ 190 GPIO_WS003SH_POWER_BUTTON, 191 -1, /* None */ 192 WS003SH_NCOLUMN, 193 WS003SH_NROW, 194 }, 195 /* WS004SH */ 196 { 197 &platid_mask_MACH_SHARP_WZERO3_WS004SH, 198 -1, /* XXX */ 199 GPIO_WS003SH_POWER_BUTTON, 200 -1, /* None */ 201 WS003SH_NCOLUMN, 202 WS003SH_NROW, 203 }, 204 /* WS007SH */ 205 { 206 &platid_mask_MACH_SHARP_WZERO3_WS007SH, 207 -1, /* XXX */ 208 GPIO_WS007SH_POWER_BUTTON, 209 GPIO_WS007SH_RESET_BUTTON, 210 WS003SH_NCOLUMN, 211 WS003SH_NROW, 212 }, 213 /* WS011SH */ 214 { 215 &platid_mask_MACH_SHARP_WZERO3_WS011SH, 216 -1, /* XXX */ 217 GPIO_WS011SH_POWER_BUTTON, 218 GPIO_WS011SH_RESET_BUTTON, 219 WS003SH_NCOLUMN, 220 WS003SH_NROW, 221 }, 222 /* WS020SH */ 223 { 224 &platid_mask_MACH_SHARP_WZERO3_WS020SH, 225 -1, /* XXX */ 226 GPIO_WS020SH_POWER_BUTTON, 227 GPIO_WS020SH_RESET_BUTTON, 228 WS003SH_NCOLUMN, 229 WS003SH_NROW, 230 }, 231 232 { NULL, -1, -1, -1, 0, 0, } 233}; 234 235static const struct wzero3kbd_model * 236wzero3kbd_lookup(void) 237{ 238 const struct wzero3kbd_model *model; 239 240 for (model = wzero3kbd_table; model->platid != NULL; model++) { 241 if (platid_match(&platid, model->platid)) { 242 return model; 243 } 244 } 245 return NULL; 246} 247 248static int 249wzero3kbd_match(device_t parent, cfdata_t cf, void *aux) 250{ 251 252 if (strcmp(cf->cf_name, "wzero3kbd") != 0) 253 return 0; 254 if (wzero3kbd_lookup() == NULL) 255 return 0; 256 return 1; 257} 258 259static void 260wzero3kbd_attach(device_t parent, device_t self, void *aux) 261{ 262 struct wzero3kbd_softc *sc = device_private(self); 263 struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux; 264 struct hpckbd_attach_args haa; 265 const struct wzero3kbd_model *model; 266 267 sc->sc_dev = self; 268 269 model = wzero3kbd_lookup(); 270 if (model == NULL) { 271 aprint_error(": unknown model\n"); 272 return; 273 } 274 275 aprint_normal(": keyboard\n"); 276 aprint_naive("\n"); 277 278 sc->sc_key_pin = model->key_pin; 279 sc->sc_power_pin = model->power_pin; 280 sc->sc_reset_pin = model->reset_pin; 281 sc->sc_ncolumn = model->ncolumn; 282 sc->sc_nrow = model->nrow; 283 284 sc->sc_iot = pxa->pxa_iot; 285 if (bus_space_map(sc->sc_iot, PXA2X0_CS2_START, REGMAPSIZE, 0, 286 &sc->sc_ioh)) { 287 aprint_error_dev(self, "couldn't map registers.\n"); 288 return; 289 } 290 291 sc->sc_okeystat = kmem_zalloc(sc->sc_nrow * sc->sc_ncolumn, KM_SLEEP); 292 sc->sc_keystat = kmem_zalloc(sc->sc_nrow * sc->sc_ncolumn, KM_SLEEP); 293 294 sc->sc_if.hii_ctx = sc; 295 sc->sc_if.hii_establish = wzero3kbd_input_establish; 296 sc->sc_if.hii_poll = wzero3kbd_poll; 297 298 /* Attach console if not using serial. */ 299 if (!(bootinfo->bi_cnuse & BI_CNUSE_SERIAL)) 300 hpckbd_cnattach(&sc->sc_if); 301 302 /* Install interrupt handler. */ 303 if (sc->sc_key_pin >= 0) { 304 pxa2x0_gpio_set_function(sc->sc_key_pin, GPIO_IN); 305 sc->sc_key_ih = pxa2x0_gpio_intr_establish(sc->sc_key_pin, 306 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr, sc); 307 if (sc->sc_key_ih == NULL) { 308 aprint_error_dev(sc->sc_dev, 309 "couldn't establish key interrupt\n"); 310 } 311 } else { 312 sc->sc_interval = KEY_INTERVAL / (1000 / hz); 313 if (sc->sc_interval < 1) 314 sc->sc_interval = 1; 315 callout_init(&sc->sc_keyscan_ch, 0); 316 callout_reset(&sc->sc_keyscan_ch, sc->sc_interval, 317 wzero3kbd_tick, sc); 318 } 319 320 /* power key */ 321 if (sc->sc_power_pin >= 0) { 322 pxa2x0_gpio_set_function(sc->sc_power_pin, GPIO_IN); 323 sc->sc_power_ih = pxa2x0_gpio_intr_establish( 324 sc->sc_power_pin, IST_EDGE_BOTH, IPL_TTY, 325 wzero3kbd_power_intr, sc); 326 if (sc->sc_power_ih == NULL) { 327 aprint_error_dev(sc->sc_dev, 328 "couldn't establish power key interrupt\n"); 329 } 330 } 331 332 /* reset button */ 333 if (sc->sc_reset_pin >= 0) { 334 pxa2x0_gpio_set_function(sc->sc_reset_pin, GPIO_IN); 335 sc->sc_reset_ih = pxa2x0_gpio_intr_establish( 336 sc->sc_reset_pin, IST_EDGE_BOTH, IPL_TTY, 337 wzero3kbd_reset_intr, sc); 338 if (sc->sc_reset_ih == NULL) { 339 aprint_error_dev(sc->sc_dev, 340 "couldn't establish reset key interrupt\n"); 341 } 342 343 sc->sc_smpsw.smpsw_name = device_xname(self); 344 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_RESET; 345 if (sysmon_pswitch_register(&sc->sc_smpsw) != 0) { 346 aprint_error_dev(sc->sc_dev, 347 "unable to register reset event handler\n"); 348 } 349 } 350 351 /* Attach hpckbd. */ 352 haa.haa_ic = &sc->sc_if; 353 config_found(self, &haa, hpckbd_print); 354 355#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 356 sc->sc_test_ih = NULL; 357 sc->sc_test_pin = -1; 358 sc->sc_nouse_pin = -1; 359 sc->sc_nouse_pin2 = -1; 360 sc->sc_nouse_pin3 = -1; 361 sc->sc_bit = 0x01; 362 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH) 363 || platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) { 364 sc->sc_nouse_pin = GPIO_WS003SH_SD_DETECT; /* SD_DETECT */ 365 sc->sc_nouse_pin2 = 86; /* Vsync? */ 366 sc->sc_nouse_pin3 = 89; /* RESET? */ 367 } 368 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) { 369 sc->sc_nouse_pin = GPIO_WS007SH_SD_DETECT; /* SD_DETECT */ 370 sc->sc_nouse_pin2 = 77; /* Vsync? */ 371 } 372 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) { 373 sc->sc_nouse_pin = GPIO_WS011SH_SD_DETECT; /* SD_DETECT */ 374 sc->sc_nouse_pin2 = 77; /* Vsync? */ 375 } 376 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS020SH)) { 377 sc->sc_nouse_pin = GPIO_WS020SH_SD_DETECT; /* SD_DETECT */ 378 sc->sc_nouse_pin2 = 77; /* Vsync? */ 379 } 380 381#ifdef KEYTEST 382 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 383 if (sc->sc_test_pin != sc->sc_nouse_pin 384 && sc->sc_test_pin != sc->sc_nouse_pin2 385 && sc->sc_test_pin != sc->sc_nouse_pin3 386 && sc->sc_test_pin != sc->sc_key_pin 387 && sc->sc_test_pin != sc->sc_power_pin 388 && sc->sc_test_pin != sc->sc_reset_pin 389 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 390 break; 391 } 392 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 393 printf("GPIO_IN: GPIO pin #%d\n", sc->sc_test_pin); 394 sc->sc_test_ih = pxa2x0_gpio_intr_establish(sc->sc_test_pin, 395 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2, sc); 396 } else { 397 sc->sc_test_pin = -1; 398 } 399#endif 400 401#ifdef KEYTEST3 402 { 403 int i; 404 printf("pin: "); 405 for (i = 0; i < PXA270_GPIO_NPINS; i++) { 406 if (i == sc->sc_nouse_pin 407 || i == sc->sc_nouse_pin2 408 || i == sc->sc_nouse_pin3 409 || i == sc->sc_key_pin 410 || i == sc->sc_power_pin 411 || i == sc->sc_reset_pin) 412 continue; 413 414 printf("%d, ", i); 415 if (GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(i))) { 416 pxa2x0_gpio_intr_establish(i, IST_EDGE_BOTH, 417 IPL_TTY, wzero3kbd_intr3, (void *)(long)i); 418 } 419 } 420 } 421#endif 422 423#ifdef KEYTEST4 424 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 425 if (sc->sc_test_pin != sc->sc_nouse_pin 426 && sc->sc_test_pin != sc->sc_nouse_pin2 427 && sc->sc_test_pin != sc->sc_nouse_pin3 428 && sc->sc_test_pin != sc->sc_key_pin 429 && sc->sc_test_pin != sc->sc_power_pin 430 && sc->sc_test_pin != sc->sc_reset_pin 431 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 432 break; 433 } 434 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 435 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 436 } else { 437 sc->sc_test_pin = -1; 438 } 439#endif 440#ifdef KEYTEST5 441 sc->sc_test_pin = 0x00; 442 sc->sc_bit = 0x01; 443#endif 444#endif 445} 446 447static int 448wzero3kbd_intr(void *arg) 449{ 450 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 451 452#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 453 printf("wzero3kbd_intr: GPIO pin #%d = %s\n", sc->sc_key_pin, 454 pxa2x0_gpio_get_bit(sc->sc_key_pin) ? "on" : "off"); 455#endif 456 457#if defined(KEYTEST4) 458 if (sc->sc_test_pin >= 0) { 459 if (pxa2x0_gpio_get_bit(sc->sc_test_pin)) { 460 printf("GPIO_OUT: GPIO pin #%d: L\n",sc->sc_test_pin); 461 pxa2x0_gpio_clear_bit(sc->sc_test_pin); 462 } else { 463 printf("GPIO_OUT: GPIO pin #%d: H\n", sc->sc_test_pin); 464 pxa2x0_gpio_set_bit(sc->sc_test_pin); 465 } 466 } 467#endif 468#if defined(KEYTEST5) 469 printf("CPLD(%#x): value=%#x, mask=%#x\n", 470 sc->sc_test_pin, CSR_READ4(sc->sc_test_pin), sc->sc_bit); 471 if (CSR_READ4(sc->sc_test_pin) & sc->sc_bit) { 472 printf("CPLD_OUT: CPLD: L\n"); 473 CSR_WRITE4(sc->sc_test_pin, 474 CSR_READ4(sc->sc_test_pin) & ~sc->sc_bit); 475 } else { 476 printf("CPLD_OUT: CPLD: H\n"); 477 CSR_WRITE4(sc->sc_test_pin, 478 CSR_READ4(sc->sc_test_pin) | sc->sc_bit); 479 } 480#endif 481 482 (void) wzero3kbd_poll1(sc); 483 484 pxa2x0_gpio_clear_intr(sc->sc_key_pin); 485 486 return 1; 487} 488 489#if defined(KEYTEST) 490static int 491wzero3kbd_intr2(void *arg) 492{ 493 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 494 495 printf("wzero3kbd_intr2: GPIO_IN: GPIO pin #%d = %s\n", sc->sc_test_pin, 496 pxa2x0_gpio_get_bit(sc->sc_test_pin) ? "on" : "off"); 497 498 return 1; 499} 500#endif 501 502#if defined(KEYTEST3) 503static int 504wzero3kbd_intr3(void *arg) 505{ 506 int pin = (int)arg; 507 508 printf("wzero3kbd_intr3: GPIO pin #%d = %s\n", pin, 509 pxa2x0_gpio_get_bit(pin) ? "on" : "off"); 510 511 return 1; 512} 513#endif 514 515 516static void 517wzero3kbd_tick(void *arg) 518{ 519 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 520 521 (void) wzero3kbd_poll1(sc); 522 523 callout_schedule(&sc->sc_keyscan_ch, sc->sc_interval); 524} 525 526static int 527wzero3kbd_power_intr(void *arg) 528{ 529 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 530 531#if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) 532 printf("wzero3kbd_power_intr: status = %s\n", 533 pxa2x0_gpio_get_bit(sc->sc_power_pin) ? "on" : "off"); 534#endif 535 536#if defined(KEYTEST) 537 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 538 if (sc->sc_test_pin >= 0) { 539 int orig_pin = sc->sc_test_pin; 540 pxa2x0_gpio_intr_disestablish(sc->sc_test_ih); 541 sc->sc_test_ih = NULL; 542 543 for (;;) { 544 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 545 sc->sc_test_pin = 2; 546 if (sc->sc_test_pin == orig_pin) 547 break; 548 if (sc->sc_test_pin != sc->sc_nouse_pin 549 && sc->sc_test_pin != sc->sc_nouse_pin2 550 && sc->sc_test_pin != sc->sc_nouse_pin3 551 && sc->sc_test_pin != sc->sc_key_pin 552 && sc->sc_test_pin != sc->sc_power_pin 553 && sc->sc_test_pin != sc->sc_reset_pin 554 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 555 break; 556 } 557 if (sc->sc_test_pin != orig_pin) { 558 printf("GPIO_IN: GPIO pin #%d\n", 559 sc->sc_test_pin); 560 sc->sc_test_ih = 561 pxa2x0_gpio_intr_establish(sc->sc_test_pin, 562 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2,sc); 563 } else { 564 sc->sc_test_pin = -1; 565 } 566 } 567 } 568#endif 569 570#if defined(KEYTEST2) 571 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 572 sc->sc_enabled ^= 2; 573 if (sc->sc_enabled & 2) { 574 printf("print col/row\n"); 575 } else { 576 printf("keyscan\n"); 577 } 578 } 579#endif 580#if defined(KEYTEST4) 581 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 582 if (sc->sc_test_pin >= 0) { 583 int orig_pin = sc->sc_test_pin; 584 for (;;) { 585 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 586 sc->sc_test_pin = 2; 587 if (sc->sc_test_pin == orig_pin) 588 break; 589 if (sc->sc_test_pin != sc->sc_nouse_pin 590 && sc->sc_test_pin != sc->sc_nouse_pin2 591 && sc->sc_test_pin != sc->sc_nouse_pin3 592 && sc->sc_test_pin != sc->sc_key_pin 593 && sc->sc_test_pin != sc->sc_power_pin 594 && sc->sc_test_pin != sc->sc_reset_pin 595 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 596 break; 597 } 598 if (sc->sc_test_pin != orig_pin) { 599 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 600 } else { 601 sc->sc_test_pin = -1; 602 } 603 } 604 } 605#endif 606#if defined(KEYTEST5) 607 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 608 sc->sc_bit <<= 1; 609 if (sc->sc_bit & ~0xff) { 610 sc->sc_bit = 0x01; 611 sc->sc_test_pin += 0x4; 612 if (sc->sc_test_pin >= 0x20) { 613 sc->sc_test_pin = 0x00; 614 } 615 } 616 printf("CPLD(%#x), mask=%#x\n", sc->sc_test_pin, sc->sc_bit); 617 } 618#endif 619 620 pxa2x0_gpio_clear_intr(sc->sc_power_pin); 621 622 return 1; 623} 624 625static int 626wzero3kbd_reset_intr(void *arg) 627{ 628 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 629 630 sysmon_task_queue_sched(0, wzero3kbd_sysmon_reset_event, sc); 631 632 pxa2x0_gpio_clear_intr(sc->sc_reset_pin); 633 634 return 1; 635} 636 637static int 638wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif) 639{ 640 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 641 642 /* Save hpckbd interface. */ 643 sc->sc_hpckbd = kbdif; 644 sc->sc_enabled = 1; 645 646 return 0; 647} 648 649static void 650wzero3kbd_sysmon_reset_event(void *arg) 651{ 652 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 653 654 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 655} 656 657static int 658wzero3kbd_poll(void *arg) 659{ 660 int keydown; 661 662 keydown = wzero3kbd_poll1(arg); 663 664 return keydown; 665} 666 667static int 668wzero3kbd_poll1(void *arg) 669{ 670 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 671 int row, col, data; 672 int keycol; 673 int keydown; 674 int i; 675 int s; 676 677 if (!sc->sc_enabled) { 678 DPRINTF(("wzero3kbd_poll: disabled\n")); 679 return 0; 680 } 681 682 s = spltty(); 683 684 for (col = 0; col < sc->sc_ncolumn; col++) { 685 /* deselect column# and charge */ 686 CSR_WRITE1(KBDCOL_L, 0); 687 CSR_WRITE1(KBDCOL_U, 0); 688 CSR_WRITE1(KBDCHARGE, 1); 689 delay(KEYWAIT); 690 CSR_WRITE1(KBDCHARGE, 0); 691 692 /* select scan column# */ 693 keycol = 1 << col; 694 CSR_WRITE1(KBDCOL_L, keycol & 0xff); 695 CSR_WRITE1(KBDCOL_U, keycol >> 8); 696 delay(KEYWAIT); 697 CSR_WRITE1(KBDCHARGE, 0); 698 699 /* read key data */ 700 data = CSR_READ1(KBDDATA); 701 for (row = 0; row < sc->sc_nrow; row++) { 702#ifdef KEYTEST2 703 if (!(sc->sc_enabled & 2)) { 704#endif 705 sc->sc_keystat[row + col * sc->sc_nrow] = 706 (data >> row) & 1; 707#ifdef KEYTEST2 708 } else if (data & (1 << row)) { 709 printf("col = %d, row = %d, idx = %d, data = 0x%02x\n", col, row, row + col * sc->sc_nrow, data); 710 } 711#endif 712 } 713 } 714 715 /* deselect column# and charge */ 716 CSR_WRITE1(KBDCOL_L, 0); 717 CSR_WRITE1(KBDCOL_U, 0); 718 CSR_WRITE1(KBDCHARGE, 1); 719 delay(KEYWAIT); 720 CSR_WRITE1(KBDCHARGE, 0); 721 722 /* send key scan code */ 723 keydown = 0; 724 for (i = 0; i < sc->sc_nrow * sc->sc_ncolumn; i++) { 725 if (sc->sc_keystat[i] == sc->sc_okeystat[i]) 726 continue; 727 728 keydown |= sc->sc_keystat[i]; 729 hpckbd_input(sc->sc_hpckbd, sc->sc_keystat[i], i); 730 sc->sc_okeystat[i] = sc->sc_keystat[i]; 731 } 732 733 splx(s); 734 735 return keydown; 736} 737