1218887Sdim/*	$NetBSD: arm_arch.cpp,v 1.7 2008/03/08 02:26:03 rafal Exp $	*/
2218887Sdim
3218887Sdim/*-
4218887Sdim * Copyright (c) 2001 The NetBSD Foundation, Inc.
5218887Sdim * All rights reserved.
6218887Sdim *
7218887Sdim * This code is derived from software contributed to The NetBSD Foundation
8218887Sdim * by UCHIYAMA Yasushi.
9218887Sdim *
10218887Sdim * Redistribution and use in source and binary forms, with or without
11218887Sdim * modification, are permitted provided that the following conditions
12218887Sdim * are met:
13218887Sdim * 1. Redistributions of source code must retain the above copyright
14249423Sdim *    notice, this list of conditions and the following disclaimer.
15243830Sdim * 2. Redistributions in binary form must reproduce the above copyright
16218887Sdim *    notice, this list of conditions and the following disclaimer in the
17243830Sdim *    documentation and/or other materials provided with the distribution.
18218887Sdim *
19249423Sdim * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20249423Sdim * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21218887Sdim * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22218887Sdim * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23249423Sdim * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24249423Sdim * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25218887Sdim * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26218887Sdim * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27218887Sdim * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28218887Sdim * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29218887Sdim * POSSIBILITY OF SUCH DAMAGE.
30218887Sdim */
31218887Sdim
32226633Sdim#include <arm/arm_arch.h>
33218887Sdim#include <console.h>
34218887Sdim#include <memory.h>
35234353Sdim#include <arm/arm_sa1100.h>
36218887Sdim
37249423SdimARMArchitecture::ARMArchitecture(Console *&cons, MemoryManager *&mem)
38249423Sdim	: Architecture(cons, mem)
39249423Sdim{
40239462Sdim	DPRINTF((TEXT("ARM architecture.\n")));
41218887Sdim}
42234353Sdim
43218887SdimARMArchitecture::~ARMArchitecture(void)
44234353Sdim{
45239462Sdim}
46218887Sdim
47226633Sdimvoid
48218887SdimARMArchitecture::systemInfo(void)
49218887Sdim{
50218887Sdim	Architecture::systemInfo();
51239462Sdim
52218887Sdim	_kmode = SetKMode(1);
53218887Sdim	DI();
54234353Sdim	if ((GetCPSR() & 0x1f) != 0x1f)
55234353Sdim		DPRINTF((TEXT("can't change to System mode\n")));
56234353Sdim
57218887Sdim	DPRINTF((TEXT("Reg0 :%08x\n"), GetCop15Reg0()));
58218887Sdim	DPRINTF((TEXT("Reg1 :%08x\n"), GetCop15Reg1()));
59218887Sdim	DPRINTF((TEXT("Reg2 :%08x\n"), GetCop15Reg2()));
60249423Sdim	DPRINTF((TEXT("Reg3 :%08x\n"), GetCop15Reg3()));
61249423Sdim	DPRINTF((TEXT("Reg5 :%08x\n"), GetCop15Reg5()));
62218887Sdim	DPRINTF((TEXT("Reg6 :%08x\n"), GetCop15Reg6()));
63239462Sdim	DPRINTF((TEXT("Reg13:%08x\n"), GetCop15Reg13()));
64249423Sdim	DPRINTF((TEXT("Reg14:%08x\n"), GetCop15Reg14()));
65249423Sdim	DPRINTF((TEXT("CPSR :%08x\n"), GetCPSR()));
66234353Sdim	EI();
67218887Sdim	SetKMode(_kmode);
68249423Sdim}
69249423Sdim