1/* $NetBSD: cons_zs.c,v 1.1 2005/12/29 15:20:09 tsutsui Exp $ */ 2 3/*- 4 * Copyright (c) 2005 Izumi Tsutsui. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/param.h> 28#include <sys/systm.h> 29 30#include <lib/libsa/stand.h> 31#include <lib/libkern/libkern.h> 32 33#include <dev/ic/z8530reg.h> 34 35#include <machine/sbd.h> 36 37#include "console.h" 38 39 40struct zs zs; 41 42static void zs_init(void); 43static int zs_cngetc(void); 44static int zs_cnscan(void); 45static void zs_cnputc(int, int, int); 46 47#define ZS_CONSDEFSPEED 9600 48 49void 50zs_set_addr(uint32_t csr, uint32_t data, int clock) 51{ 52 53 zs.csr = (volatile uint8_t *)csr; 54 zs.data = (volatile uint8_t *)data; 55 zs.clock = clock; 56 57 cons.init = zs_init; 58 cons.getc = zs_cngetc; 59 cons.scan = zs_cnscan; 60 cons.putc = zs_cnputc; 61} 62 63#define ZS_WRITE_REG(zs, reg, val) \ 64 do { \ 65 *zs.csr = reg; \ 66 *zs.csr = val; \ 67 } while (/* CONSTCOND */ 0) 68 69static void 70zs_init(void) 71{ 72 73 ZS_WRITE_REG(zs, 9, 0); 74 ZS_WRITE_REG(zs, 9, ZSWR9_HARD_RESET); 75 76 ZS_WRITE_REG(zs, 4, ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP); 77 ZS_WRITE_REG(zs, 10, 0x00); 78 ZS_WRITE_REG(zs, 3, ZSWR3_RX_8); 79 ZS_WRITE_REG(zs, 5, ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS); 80 81 ZS_WRITE_REG(zs, 6, 0x00); 82 ZS_WRITE_REG(zs, 7, 0x00); 83 84 ZS_WRITE_REG(zs, 14, ZSWR14_BAUD_FROM_PCLK); 85 ZS_WRITE_REG(zs, 11, ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD); 86 ZS_WRITE_REG(zs, 12, BPS_TO_TCONST(zs.clock / 16, ZS_CONSDEFSPEED)); 87 ZS_WRITE_REG(zs, 13, 0); 88 89 ZS_WRITE_REG(zs, 14, ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA); 90 ZS_WRITE_REG(zs, 15, 0x00); 91 92 *zs.csr = ZSWR0_RESET_STATUS; 93 *zs.csr = ZSWR0_RESET_STATUS; 94 95 ZS_WRITE_REG(zs, 3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE); 96 ZS_WRITE_REG(zs, 5, 97 ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS | ZSWR5_TX_ENABLE); 98} 99 100static int 101zs_cngetc(void) 102{ 103 int csr, data; 104 105 do { 106 csr = *zs.csr; 107 } while ((csr & ZSRR0_RX_READY) == 0); 108 109 data = *zs.data; 110 111 return data; 112} 113 114int 115zs_cnscan(void) 116{ 117 int csr, data; 118 119 csr = *zs.csr; 120 if ((csr & ZSRR0_RX_READY) == 0) 121 return -1; 122 123 data = *zs.data; 124 125 return data; 126} 127 128static void 129zs_cnputc(int x, int y, int c) 130{ 131 int csr; 132 133 do { 134 csr = *zs.csr; 135 } while ((csr & ZSRR0_TX_READY) == 0); 136 137 *zs.data = c; 138} 139