machdep.c revision 1.16 
1/*	$NetBSD: machdep.c,v 1.16 2000/06/26 14:20:42 mrg Exp $	*/
2
3/*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 * Simulation Facility, NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*-
41 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
42 * All rights reserved.
43 *
44 * This code is derived from software contributed to Berkeley by
45 * William Jolitz.
46 *
47 * Redistribution and use in source and binary forms, with or without
48 * modification, are permitted provided that the following conditions
49 * are met:
50 * 1. Redistributions of source code must retain the above copyright
51 *    notice, this list of conditions and the following disclaimer.
52 * 2. Redistributions in binary form must reproduce the above copyright
53 *    notice, this list of conditions and the following disclaimer in the
54 *    documentation and/or other materials provided with the distribution.
55 * 3. All advertising materials mentioning features or use of this software
56 *    must display the following acknowledgement:
57 *	This product includes software developed by the University of
58 *	California, Berkeley and its contributors.
59 * 4. Neither the name of the University nor the names of its contributors
60 *    may be used to endorse or promote products derived from this software
61 *    without specific prior written permission.
62 *
63 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
64 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
65 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
66 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
69 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
70 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
71 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
72 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
73 * SUCH DAMAGE.
74 *
75 *	@(#)machdep.c	7.4 (Berkeley) 6/3/91
76 */
77
78#include "opt_ddb.h"
79#include "opt_syscall_debug.h"
80#include "opt_memsize.h"
81#include "opt_initbsc.h"
82
83#include <sys/param.h>
84#include <sys/systm.h>
85#include <sys/signalvar.h>
86#include <sys/kernel.h>
87#include <sys/map.h>
88#include <sys/proc.h>
89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/buf.h>
92#include <sys/reboot.h>
93#include <sys/conf.h>
94#include <sys/file.h>
95#include <sys/malloc.h>
96#include <sys/mbuf.h>
97#include <sys/msgbuf.h>
98#include <sys/mount.h>
99#include <sys/vnode.h>
100#include <sys/device.h>
101#include <sys/extent.h>
102#include <sys/syscallargs.h>
103
104#ifdef KGDB
105#include <sys/kgdb.h>
106#endif
107
108#include <dev/cons.h>
109
110#include <vm/vm.h>
111
112#include <uvm/uvm_extern.h>
113
114#include <sys/sysctl.h>
115
116#include <machine/cpu.h>
117#include <machine/cpufunc.h>
118#include <machine/psl.h>
119#include <machine/bootinfo.h>
120#include <machine/bus.h>
121#include <sh3/bscreg.h>
122#include <sh3/ccrreg.h>
123#include <sh3/cpgreg.h>
124#include <sh3/intcreg.h>
125#include <sh3/pfcreg.h>
126#include <sh3/wdtreg.h>
127
128#include <sys/termios.h>
129#include "sci.h"
130
131/* the following is used externally (sysctl_hw) */
132char machine[] = MACHINE;		/* cpu "architecture" */
133char machine_arch[] = MACHINE_ARCH;	/* machine_arch = "sh3" */
134
135#ifdef sh3_debug
136int cpu_debug_mode = 1;
137#else
138int cpu_debug_mode = 0;
139#endif
140
141char bootinfo[BOOTINFO_MAXSIZE];
142
143int physmem;
144int dumpmem_low;
145int dumpmem_high;
146vaddr_t atdevbase;	/* location of start of iomem in virtual */
147paddr_t msgbuf_paddr;
148struct user *proc0paddr;
149
150extern int boothowto;
151extern paddr_t avail_start, avail_end;
152
153#ifdef	SYSCALL_DEBUG
154#define	SCDEBUG_ALL 0x0004
155extern int	scdebug;
156#endif
157
158#define IOM_RAM_END	((paddr_t)IOM_RAM_BEGIN + IOM_RAM_SIZE - 1)
159
160/*
161 * Extent maps to manage I/O and ISA memory hole space.  Allocate
162 * storage for 8 regions in each, initially.  Later, ioport_malloc_safe
163 * will indicate that it's safe to use malloc() to dynamically allocate
164 * region descriptors.
165 *
166 * N.B. At least two regions are _always_ allocated from the iomem
167 * extent map; (0 -> ISA hole) and (end of ISA hole -> end of RAM).
168 *
169 * The extent maps are not static!  Machine-dependent ISA and EISA
170 * routines need access to them for bus address space allocation.
171 */
172static	long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
173struct	extent *ioport_ex;
174struct	extent *iomem_ex;
175static	int ioport_malloc_safe;
176
177void setup_bootinfo __P((void));
178void dumpsys __P((void));
179void identifycpu __P((void));
180void initSH3 __P((void *));
181void InitializeSci  __P((unsigned char));
182void sh3_cache_on __P((void));
183void LoadAndReset __P((char *));
184void XLoadAndReset __P((char *));
185void Sh3Reset __P((void));
186#ifdef SH4
187void sh4_cache_flush __P((vaddr_t));
188#endif
189
190#include <dev/ic/comreg.h>
191#include <dev/ic/comvar.h>
192
193void	consinit __P((void));
194
195/*
196 * Machine-dependent startup code
197 *
198 * This is called from main() in kern/main.c.
199 */
200void
201cpu_startup()
202{
203
204	sh3_startup();
205
206	/* Safe for i/o port allocation to use malloc now. */
207	ioport_malloc_safe = 1;
208
209#ifdef SYSCALL_DEBUG
210	scdebug |= SCDEBUG_ALL;
211#endif
212
213#ifdef FORCE_RB_SINGLE
214	boothowto |= RB_SINGLE;
215#endif
216}
217
218#define CPUDEBUG
219
220/*
221 * machine dependent system variables.
222 */
223int
224cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p)
225	int *name;
226	u_int namelen;
227	void *oldp;
228	size_t *oldlenp;
229	void *newp;
230	size_t newlen;
231	struct proc *p;
232{
233	dev_t consdev;
234	struct btinfo_bootpath *bibp;
235	struct trapframe *tf;
236	char *osimage;
237
238	/* all sysctl names at this level are terminal */
239	if (namelen != 1)
240		return (ENOTDIR);		/* overloaded */
241
242	switch (name[0]) {
243	case CPU_CONSDEV:
244		if (cn_tab != NULL)
245			consdev = cn_tab->cn_dev;
246		else
247			consdev = NODEV;
248		return (sysctl_rdstruct(oldp, oldlenp, newp, &consdev,
249		    sizeof consdev));
250
251	case CPU_NKPDE:
252		return (sysctl_rdint(oldp, oldlenp, newp, nkpde));
253
254	case CPU_BOOTED_KERNEL:
255	        bibp = lookup_bootinfo(BTINFO_BOOTPATH);
256	        if (!bibp)
257			return (ENOENT); /* ??? */
258		return (sysctl_rdstring(oldp, oldlenp, newp, bibp->bootpath));
259
260	case CPU_SETPRIVPROC:
261		if (newp == NULL)
262			return (0);
263
264		/* set current process to priviledged process */
265		tf = p->p_md.md_regs;
266		tf->tf_ssr |= PSL_MD;
267		return (0);
268
269	case CPU_DEBUGMODE:
270		return (sysctl_int(oldp, oldlenp, newp, newlen,
271				   &cpu_debug_mode));
272
273	case CPU_LOADANDRESET:
274		if (newp != NULL) {
275			osimage = (char *)(*(u_long *)newp);
276
277			LoadAndReset(osimage);
278			/* not reach here */
279		}
280		return (0);
281
282	default:
283		return (EOPNOTSUPP);
284	}
285	/* NOTREACHED */
286}
287
288int waittime = -1;
289struct pcb dumppcb;
290
291void
292cpu_reboot(howto, bootstr)
293	int howto;
294	char *bootstr;
295{
296
297	if (cold) {
298		howto |= RB_HALT;
299		goto haltsys;
300	}
301
302	boothowto = howto;
303	if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
304		waittime = 0;
305		vfs_shutdown();
306		/*
307		 * If we've been adjusting the clock, the todr
308		 * will be out of synch; adjust it now.
309		 */
310		/* resettodr(); */
311	}
312
313	/* Disable interrupts. */
314	splhigh();
315
316	/* Do a dump if requested. */
317	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
318		dumpsys();
319
320haltsys:
321	doshutdownhooks();
322
323	if (howto & RB_HALT) {
324		printf("\n");
325		printf("The operating system has halted.\n");
326		printf("Please press any key to reboot.\n\n");
327		cngetc();
328	}
329
330	printf("rebooting...\n");
331	cpu_reset();
332	for(;;)
333		;
334	/*NOTREACHED*/
335}
336
337/*
338 * These variables are needed by /sbin/savecore
339 */
340u_long	dumpmag = 0x8fca0101;	/* magic number */
341int 	dumpsize = 0;		/* pages */
342long	dumplo = 0; 		/* blocks */
343
344/*
345 * This is called by main to set dumplo and dumpsize.
346 * Dumps always skip the first CLBYTES of disk space
347 * in case there might be a disk label stored there.
348 * If there is extra space, put dump at the end to
349 * reduce the chance that swapping trashes it.
350 */
351void
352cpu_dumpconf()
353{
354#ifdef	TODO
355	int nblks;	/* size of dump area */
356	int maj;
357
358	if (dumpdev == NODEV)
359		return;
360	maj = major(dumpdev);
361	if (maj < 0 || maj >= nblkdev)
362		panic("dumpconf: bad dumpdev=0x%x", dumpdev);
363	if (bdevsw[maj].d_psize == NULL)
364		return;
365	nblks = (*bdevsw[maj].d_psize)(dumpdev);
366	if (nblks <= ctod(1))
367		return;
368
369	dumpsize = btoc(IOM_END + ctob(dumpmem_high));
370
371	/* Always skip the first CLBYTES, in case there is a label there. */
372	if (dumplo < ctod(1))
373		dumplo = ctod(1);
374
375	/* Put dump at end of partition, and make it fit. */
376	if (dumpsize > dtoc(nblks - dumplo))
377		dumpsize = dtoc(nblks - dumplo);
378	if (dumplo < nblks - ctod(dumpsize))
379		dumplo = nblks - ctod(dumpsize);
380#endif
381}
382
383/*
384 * Doadump comes here after turning off memory management and
385 * getting on the dump stack, either when called above, or by
386 * the auto-restart code.
387 */
388#define BYTES_PER_DUMP  NBPG	/* must be a multiple of pagesize XXX small */
389static vaddr_t dumpspace;
390
391vaddr_t
392reserve_dumppages(p)
393	vaddr_t p;
394{
395
396	dumpspace = p;
397	return (p + BYTES_PER_DUMP);
398}
399
400void
401dumpsys()
402{
403#ifdef	TODO
404	unsigned bytes, i, n;
405	int maddr, psize;
406	daddr_t blkno;
407	int (*dump) __P((dev_t, daddr_t, caddr_t, size_t));
408	int error;
409
410	/* Save registers. */
411	savectx(&dumppcb);
412
413	msgbufmapped = 0;	/* don't record dump msgs in msgbuf */
414	if (dumpdev == NODEV)
415		return;
416
417	/*
418	 * For dumps during autoconfiguration,
419	 * if dump device has already configured...
420	 */
421	if (dumpsize == 0)
422		cpu_dumpconf();
423	if (dumplo < 0)
424		return;
425	printf("\ndumping to dev %x, offset %ld\n", dumpdev, dumplo);
426
427	psize = (*bdevsw[major(dumpdev)].d_psize)(dumpdev);
428	printf("dump ");
429	if (psize == -1) {
430		printf("area unavailable\n");
431		return;
432	}
433
434#if 0	/* XXX this doesn't work.  grr. */
435        /* toss any characters present prior to dump */
436	while (sget() != NULL); /* syscons and pccons differ */
437#endif
438
439	bytes = ctob(dumpmem_high) + IOM_END;
440	maddr = 0;
441	blkno = dumplo;
442	dump = bdevsw[major(dumpdev)].d_dump;
443	error = 0;
444	for (i = 0; i < bytes; i += n) {
445		/*
446		 * Avoid dumping the ISA memory hole, and areas that
447		 * BIOS claims aren't in low memory.
448		 */
449		if (i >= ctob(dumpmem_low) && i < IOM_END) {
450			n = IOM_END - i;
451			maddr += n;
452			blkno += btodb(n);
453			continue;
454		}
455
456		/* Print out how many MBs we to go. */
457		n = bytes - i;
458		if (n && (n % (1024*1024)) == 0)
459			printf("%d ", n / (1024 * 1024));
460
461		/* Limit size for next transfer. */
462		if (n > BYTES_PER_DUMP)
463			n =  BYTES_PER_DUMP;
464
465		(void) pmap_map(dumpspace, maddr, maddr + n, VM_PROT_READ);
466		error = (*dump)(dumpdev, blkno, (caddr_t)dumpspace, n);
467		if (error)
468			break;
469		maddr += n;
470		blkno += btodb(n);			/* XXX? */
471
472#if 0	/* XXX this doesn't work.  grr. */
473		/* operator aborting dump? */
474		if (sget() != NULL) {
475			error = EINTR;
476			break;
477		}
478#endif
479	}
480
481	switch (error) {
482
483	case ENXIO:
484		printf("device bad\n");
485		break;
486
487	case EFAULT:
488		printf("device not ready\n");
489		break;
490
491	case EINVAL:
492		printf("area improper\n");
493		break;
494
495	case EIO:
496		printf("i/o error\n");
497		break;
498
499	case EINTR:
500		printf("aborted from console\n");
501		break;
502
503	case 0:
504		printf("succeeded\n");
505		break;
506
507	default:
508		printf("error %d\n", error);
509		break;
510	}
511	printf("\n\n");
512	delay(5000000);		/* 5 seconds */
513#endif	/* TODO */
514}
515
516/*
517 * Initialize segments and descriptor tables
518 */
519#define VBRINIT		((char *)IOM_RAM_BEGIN)
520#define Trap100Vec	(VBRINIT + 0x100)
521#define Trap600Vec	(VBRINIT + 0x600)
522#define TLBVECTOR	(VBRINIT + 0x400)
523#define VADDRSTART	VM_MIN_KERNEL_ADDRESS
524
525extern int nkpde;
526extern char MonTrap100[], MonTrap100_end[];
527extern char MonTrap600[], MonTrap600_end[];
528extern char _start[], etext[], edata[], end[];
529extern char tlbmisshandler_stub[], tlbmisshandler_stub_end[];
530
531void
532initSH3(pc)
533	void *pc;	/* XXX return address */
534{
535	paddr_t avail;
536	pd_entry_t *pagedir;
537	pt_entry_t *pagetab, pte;
538	u_int sp;
539	int x;
540	char *p;
541
542	avail = sh3_round_page(end);
543
544	/* XXX nkpde = kernel page dir area (IOM_RAM_SIZE*2 Mbyte (why?)) */
545	nkpde = IOM_RAM_SIZE >> (PDSHIFT - 1);
546
547	/*
548	 * clear .bss, .common area, page dir area,
549	 *	process0 stack, page table area
550	 */
551	p = (char *)avail + (1 + UPAGES) * NBPG + NBPG * (1 + nkpde); /* XXX */
552	bzero(edata, p - edata);
553
554	/*
555	 * install trap handler
556	 */
557	bcopy(MonTrap100, Trap100Vec, MonTrap100_end - MonTrap100);
558	bcopy(MonTrap600, Trap600Vec, MonTrap600_end - MonTrap600);
559	__asm ("ldc %0, vbr" :: "r"(VBRINIT));
560
561/*
562 *                          edata  end
563 *	+-------------+------+-----+----------+-------------+------------+
564 *	| kernel text | data | bss | Page Dir | Proc0 Stack | Page Table |
565 *	+-------------+------+-----+----------+-------------+------------+
566 *                                     NBPG       USPACE    (1+nkpde)*NBPG
567 *                                                (= 4*NBPG)
568 *	Build initial page tables
569 */
570	pagedir = (void *)avail;
571	pagetab = (void *)(avail + SYSMAP);
572
573	/*
574	 * Construct a page table directory
575	 * In SH3 H/W does not support PTD,
576	 * these structures are used by S/W.
577	 */
578	pte = (pt_entry_t)pagetab;
579	pte |= PG_KW | PG_V | PG_4K | PG_M | PG_N;
580	pagedir[KERNTEXTOFF >> PDSHIFT] = pte;
581
582	/* make pde for 0xd0000000, 0xd0400000, 0xd0800000,0xd0c00000,
583		0xd1000000, 0xd1400000, 0xd1800000, 0xd1c00000 */
584	pte += NBPG;
585	for (x = 0; x < nkpde; x++) {
586		pagedir[(VADDRSTART >> PDSHIFT) + x] = pte;
587		pte += NBPG;
588	}
589
590	/* Install a PDE recursively mapping page directory as a page table! */
591	pte = (u_int)pagedir;
592	pte |= PG_V | PG_4K | PG_KW | PG_M | PG_N;
593	pagedir[PDSLOT_PTE] = pte;
594
595	/* set PageDirReg */
596	SHREG_TTB = (u_int)pagedir;
597
598	/* Set TLB miss handler */
599	p = tlbmisshandler_stub;
600	x = tlbmisshandler_stub_end - p;
601	bcopy(p, TLBVECTOR, x);
602
603	/*
604	 * Activate MMU
605	 */
606
607#ifdef SH4
608	SHREG_MMUCR = MMUCR_AT | MMUCR_TF | MMUCR_SV | MMUCR_SQMD;
609#else
610	SHREG_MMUCR = MMUCR_AT | MMUCR_TF | MMUCR_SV;
611#endif
612
613	/*
614	 * Now here is virtual address
615	 */
616
617	/* Set proc0paddr */
618	proc0paddr = (void *)(avail + NBPG);
619
620	/* Set pcb->PageDirReg of proc0 */
621	proc0paddr->u_pcb.pageDirReg = (int)pagedir;
622
623	/* avail_start is first available physical memory address */
624	avail_start = avail + NBPG + USPACE + NBPG + NBPG * nkpde;
625
626	/* atdevbase is first available logical memory address */
627	atdevbase = VADDRSTART;
628
629	proc0.p_addr = proc0paddr; /* page dir address */
630
631	/* XXX: PMAP_NEW requires valid curpcb.   also init'd in cpu_startup */
632	curpcb = &proc0.p_addr->u_pcb;
633
634	/*
635	 * Initialize the I/O port and I/O mem extent maps.
636	 * Note: we don't have to check the return value since
637	 * creation of a fixed extent map will never fail (since
638	 * descriptor storage has already been allocated).
639	 *
640	 * N.B. The iomem extent manages _all_ physical addresses
641	 * on the machine.  When the amount of RAM is found, the two
642	 * extents of RAM are allocated from the map (0 -> ISA hole
643	 * and end of ISA hole -> end of RAM).
644	 */
645	iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF,
646	    (caddr_t)iomem_ex_storage, sizeof(iomem_ex_storage),
647	    EX_NOCOALESCE|EX_NOWAIT);
648
649#if 0
650	consinit();	/* XXX SHOULD NOT BE DONE HERE */
651#endif
652
653	splraise(-1);
654	enable_intr();
655
656	avail_end = sh3_trunc_page(IOM_RAM_END + 1);
657
658	printf("initSH3\r\n");
659
660	/*
661	 * Calculate check sum
662	 */
663    {
664	u_short *p, sum;
665	int size;
666
667	size = etext - _start;
668	p = (u_short *)_start;
669	sum = 0;
670	size >>= 1;
671	while (size--)
672		sum += *p++;
673	printf("Check Sum = 0x%x\r\n", sum);
674    }
675	/*
676	 * Allocate the physical addresses used by RAM from the iomem
677	 * extent map.  This is done before the addresses are
678	 * page rounded just to make sure we get them all.
679	 */
680	if (extent_alloc_region(iomem_ex, IOM_RAM_BEGIN,
681				(IOM_RAM_END-IOM_RAM_BEGIN) + 1,
682				EX_NOWAIT)) {
683		/* XXX What should we do? */
684		printf("WARNING: CAN'T ALLOCATE RAM MEMORY FROM IOMEM EXTENT MAP!\n");
685	}
686
687	/* number of pages of physmem addr space */
688	physmem = btoc(IOM_RAM_END - IOM_RAM_BEGIN +1);
689#ifdef	TODO
690	dumpmem = physmem;
691#endif
692
693	/*
694	 * Initialize for pmap_free_pages and pmap_next_page.
695	 * These guys should be page-aligned.
696	 */
697	if (physmem < btoc(2 * 1024 * 1024)) {
698		printf("warning: too little memory available; "
699		       "have %d bytes, want %d bytes\n"
700		       "running in degraded mode\n"
701		       "press a key to confirm\n\n",
702		       ctob(physmem), 2*1024*1024);
703		cngetc();
704	}
705
706	/* Call pmap initialization to make new kernel address space */
707	pmap_bootstrap(atdevbase);
708
709	/*
710	 * Initialize error message buffer (at end of core).
711	 */
712	initmsgbuf((caddr_t)msgbuf_paddr, round_page(MSGBUFSIZE));
713
714	/*
715	 * set boot device information
716	 */
717	setup_bootinfo();
718
719#if 0
720	sh3_cache_on();
721#endif
722
723	/* setup proc0 stack */
724	sp = avail + NBPG + USPACE - 16 - sizeof(struct trapframe);
725
726	/*
727	 * XXX We can't return here, because we change stack pointer.
728	 *     So jump to return address directly.
729	 */
730	__asm __volatile ("jmp @%0; mov %1, r15" :: "r"(pc), "r"(sp));
731}
732
733void
734setup_bootinfo(void)
735{
736	struct btinfo_bootdisk *help;
737
738	*(int *)bootinfo = 1;
739	help = (struct btinfo_bootdisk *)(bootinfo + sizeof(int));
740	help->biosdev = 0;
741	help->partition = 0;
742	((struct btinfo_common *)help)->len = sizeof(struct btinfo_bootdisk);
743	((struct btinfo_common *)help)->type = BTINFO_BOOTDISK;
744}
745
746void *
747lookup_bootinfo(type)
748	int type;
749{
750	struct btinfo_common *help;
751	int n = *(int*)bootinfo;
752	help = (struct btinfo_common *)(bootinfo + sizeof(int));
753	while (n--) {
754		if (help->type == type)
755			return (help);
756		help = (struct btinfo_common *)((char*)help + help->len);
757	}
758	return (0);
759}
760
761
762/*
763 * consinit:
764 * initialize the system console.
765 * XXX - shouldn't deal with this initted thing, but then,
766 * it shouldn't be called from init386 either.
767 */
768void
769consinit()
770{
771	static int initted;
772
773	if (initted)
774		return;
775	initted = 1;
776
777	cninit();
778
779#ifdef DDB
780	ddb_init();
781#endif
782}
783
784void
785cpu_reset()
786{
787
788	disable_intr();
789
790	Sh3Reset();
791	for (;;)
792		;
793}
794
795int
796bus_space_map (t, addr, size, flags, bshp)
797	bus_space_tag_t t;
798	bus_addr_t addr;
799	bus_size_t size;
800	int flags;
801	bus_space_handle_t *bshp;
802{
803
804	*bshp = (bus_space_handle_t)addr;
805
806	return 0;
807}
808
809int
810sh_memio_subregion(t, bsh, offset, size, nbshp)
811	bus_space_tag_t t;
812	bus_space_handle_t bsh;
813	bus_size_t offset, size;
814	bus_space_handle_t *nbshp;
815{
816
817	*nbshp = bsh + offset;
818	return (0);
819}
820
821int
822sh_memio_alloc(t, rstart, rend, size, alignment, boundary, flags,
823	       bpap, bshp)
824	bus_space_tag_t t;
825	bus_addr_t rstart, rend;
826	bus_size_t size, alignment, boundary;
827	int flags;
828	bus_addr_t *bpap;
829	bus_space_handle_t *bshp;
830{
831	*bshp = *bpap = rstart;
832
833	return (0);
834}
835
836void
837sh_memio_free(t, bsh, size)
838	bus_space_tag_t t;
839	bus_space_handle_t bsh;
840	bus_size_t size;
841{
842
843}
844
845void
846sh_memio_unmap(t, bsh, size)
847	bus_space_tag_t t;
848	bus_space_handle_t bsh;
849	bus_size_t size;
850{
851	return;
852}
853
854/*
855 * InitializeBsc
856 * : BSC(Bus State Controler)
857 */
858void InitializeBsc __P((void));
859
860void
861InitializeBsc()
862{
863
864	/*
865	 * Drive RAS,CAS in stand by mode and bus release mode
866	 * Area0 = Normal memory, Area5,6=Normal(no burst)
867	 * Area2 = Normal memory, Area3 = SDRAM, Area5 = Normal memory
868	 * Area4 = Normal Memory
869	 * Area6 = Normal memory
870	 */
871	SHREG_BCR1 = BSC_BCR1_VAL;
872
873	/*
874	 * Bus Width
875	 * Area4: Bus width = 16bit
876	 * Area6,5 = 16bit
877	 * Area1 = 8bit
878	 * Area2,3: Bus width = 32bit
879	 */
880	SHREG_BCR2 = BSC_BCR2_VAL;
881
882	/*
883	 * Idle cycle number in transition area and read to write
884	 * Area6 = 3, Area5 = 3, Area4 = 3, Area3 = 3, Area2 = 3
885	 * Area1 = 3, Area0 = 3
886	 */
887	SHREG_WCR1 = BSC_WCR1_VAL;
888
889	/*
890	 * Wait cycle
891	 * Area 6 = 6
892	 * Area 5 = 2
893	 * Area 4 = 10
894	 * Area 3 = 3
895	 * Area 2,1 = 3
896	 * Area 0 = 6
897	 */
898	SHREG_WCR2 = BSC_WCR2_VAL;
899
900#if defined(SH4) && defined(BSC_WCR3_VAL)
901	SHREG_WCR3 = BSC_WCR3_VAL;
902#endif
903
904	/*
905	 * RAS pre-charge = 2cycle, RAS-CAS delay = 3 cycle,
906	 * write pre-charge=1cycle
907	 * CAS before RAS refresh RAS assert time = 3 cycle
908	 * Disable burst, Bus size=32bit, Column Address=10bit, Refresh ON
909	 * CAS before RAS refresh ON, EDO DRAM
910	 */
911	SHREG_MCR = BSC_MCR_VAL;
912
913#if defined(BSC_SDMR2_VAL)
914#define SDMR2	(*(volatile unsigned char  *)BSC_SDMR2_VAL)
915
916	SDMR2 = 0;
917#endif
918
919#if defined(BSC_SDMR3_VAL)
920#ifndef COMPUTEXEVB
921#define SDMR3	(*(volatile unsigned char  *)BSC_SDMR3_VAL)
922
923	SDMR3 = 0;
924#else
925#define ADDSET	(*(volatile unsigned short *)0x1A000000)
926#define ADDRST	(*(volatile unsigned short *)0x18000000)
927#define SDMR3	(*(volatile unsigned char  *)BSC_SDMR3_VAL)
928
929	ADDSET = 0;
930	SDMR3 = 0;
931	ADDRST = 0;
932#endif
933#endif
934
935	/*
936	 * PCMCIA Control Register
937	 * OE/WE assert delay 3.5 cycle
938	 * OE/WE negate-address delay 3.5 cycle
939	 */
940#ifdef BSC_PCR_VAL
941	SHREG_PCR = BSC_PCR_VAL;
942#endif
943
944	/*
945	 * Refresh Timer Control/Status Register
946	 * Disable interrupt by CMF, closk 1/16, Disable OVF interrupt
947	 * Count Limit = 1024
948	 * In following statement, the reason why high byte = 0xa5(a4 in RFCR)
949	 * is the rule of SH3 in writing these register.
950	 */
951	SHREG_RTCSR = BSC_RTCSR_VAL;
952
953
954	/*
955	 * Refresh Timer Counter
956	 * Initialize to 0
957	 */
958#ifdef BSC_RTCNT_VAL
959	SHREG_RTCNT = BSC_RTCNT_VAL;
960#endif
961
962	/* set Refresh Time Constant Register */
963	SHREG_RTCOR = BSC_RTCOR_VAL;
964
965	/* init Refresh Count Register */
966#ifdef BSC_RFCR_VAL
967	SHREG_RFCR = BSC_RFCR_VAL;
968#endif
969
970	/* Set Clock mode (make internal clock double speed) */
971
972	SHREG_FRQCR = FRQCR_VAL;
973
974#ifndef MMEYE_NO_CACHE
975	/* Cache ON */
976	SHREG_CCR = CCR_CE;
977#endif
978}
979
980void
981sh3_cache_on(void)
982{
983#ifndef MMEYE_NO_CACHE
984	/* Cache ON */
985	SHREG_CCR = CCR_CE;
986	SHREG_CCR = CCR_CF | CCR_CE;	/* cache clear */
987	SHREG_CCR = CCR_CE;		/* cache on */
988#endif
989}
990
991#ifdef SH4
992void
993sh4_cache_flush(addr)
994	vaddr_t addr;
995{
996#if 1
997#define SH_ADDR_ARRAY_BASE_ADDR 0xf4000000
998#define WRITE_ADDR_ARRAY( entry ) \
999	(*(volatile u_int32_t *)(SH_ADDR_ARRAY_BASE_ADDR|(entry)|0x00))
1000
1001	int entry;
1002
1003	entry = ((u_int32_t)addr) & 0x3fe0;
1004
1005	WRITE_ADDR_ARRAY(entry) = 0;
1006#else
1007	volatile int *p = (int *)IOM_RAM_BEGIN;
1008	int i;
1009	/* volatile */int d;
1010
1011	for(i = 0; i < 512; i++){
1012		d = *p;
1013		p += 8;
1014	}
1015#endif
1016}
1017#endif
1018
1019#include <machine/mmeye.h>
1020
1021 /* XXX This value depends on physical available memory */
1022#define OSIMAGE_BUF_ADDR	(IOM_RAM_BEGIN + 0x00400000)
1023
1024void
1025LoadAndReset(osimage)
1026	char *osimage;
1027{
1028	void *buf_addr;
1029	u_long size;
1030	u_long *src;
1031	u_long *dest;
1032	u_long csum = 0;
1033	u_long csum2 = 0;
1034	u_long size2;
1035
1036	printf("LoadAndReset: copy start\n");
1037	buf_addr = (void *)OSIMAGE_BUF_ADDR;
1038
1039	size = *(u_long *)osimage;
1040	src = (u_long *)osimage;
1041	dest = buf_addr;
1042
1043	size = (size + sizeof(u_long) * 2 + 3) >> 2;
1044	size2 = size;
1045
1046	while (size--) {
1047		csum += *src;
1048		*dest++ = *src++;
1049	}
1050
1051	dest = buf_addr;
1052	while (size2--)
1053		csum2 += *dest++;
1054
1055	printf("LoadAndReset: copy end[%lx,%lx]\n", csum, csum2);
1056	printf("start XLoadAndReset\n");
1057
1058	/* mask all externel interrupt (XXX) */
1059
1060	XLoadAndReset(buf_addr);
1061}
1062