1/* $NetBSD: mainbus.c,v 1.8 2021/08/07 16:18:52 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart@augustsson.net) at Sandburst Corp. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <sys/cdefs.h> 33__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.8 2021/08/07 16:18:52 thorpej Exp $"); 34 35#include <sys/param.h> 36#include <sys/device.h> 37#include <sys/systm.h> 38 39#include <sys/bus.h> 40#include <machine/pmppc.h> 41#include <arch/evbppc/pmppc/dev/mainbus.h> 42 43#include <dev/ic/cpc700reg.h> 44 45#include "locators.h" 46#include "mainbus.h" 47 48#if NCPU == 0 49#error A cpu device is now required 50#endif 51 52int mainbus_match(device_t, cfdata_t, void *); 53void mainbus_attach(device_t, device_t, void *); 54 55CFATTACH_DECL_NEW(mainbus, 0, 56 mainbus_match, mainbus_attach, NULL, NULL); 57 58static int mainbus_print(void *, const char *); 59 60/* 61 * Probe for the mainbus; always succeeds. 62 */ 63int 64mainbus_match(device_t parent, cfdata_t match, void *aux) 65{ 66 67 return 1; 68} 69 70static int 71mainbus_submatch(device_t parent, cfdata_t cf, 72 const int *ldesc, void *aux) 73{ 74 struct mainbus_attach_args *maa = aux; 75 76 if (cf->cf_loc[MAINBUSCF_ADDR] != maa->mb_addr) 77 return (0); 78 79 return (config_match(parent, cf, aux)); 80} 81 82static int 83mainbus_print(void *aux, const char *pnp) 84{ 85 struct mainbus_attach_args *mba = aux; 86 87 if (pnp) 88 aprint_normal("%s at %s", mba->mb_name, pnp); 89 if (mba->mb_addr != MAINBUSCF_ADDR_DEFAULT) 90 aprint_normal(" addr 0x%08lx", mba->mb_addr); 91 if (mba->mb_irq != MAINBUSCF_IRQ_DEFAULT) 92 aprint_normal(" irq %d", mba->mb_irq); 93 return (UNCONF); 94} 95 96/* 97 * Attach the mainbus. 98 */ 99void 100mainbus_attach(device_t parent, device_t self, void *aux) 101{ 102 struct mainbus_attach_args maa; 103 104 aprint_normal(": Artesyn PM/PPC\n"); 105 aprint_normal_dev(self, "%sPCI bus Monarch\n", 106 a_config.a_is_monarch ? "" : "not"); 107 aprint_normal_dev(self, "boot from %s, %sECC, %s L2 cache\n", 108 a_config.a_boot_device == A_BOOT_ROM ? "ROM" : "flash", 109 a_config.a_has_ecc ? "" : "no ", 110 a_config.a_l2_cache == A_CACHE_PARITY ? "parity" : 111 a_config.a_l2_cache == A_CACHE_NO_PARITY ? "no-parity" : "no"); 112 113 maa.mb_bt = &pmppc_mem_tag; 114 115 maa.mb_name = "cpu"; 116 maa.mb_addr = MAINBUSCF_ADDR_DEFAULT; 117 maa.mb_irq = MAINBUSCF_IRQ_DEFAULT; 118 config_found(self, &maa, mainbus_print, CFARGS_NONE); 119 120 if (a_config.a_has_rtc) { 121 maa.mb_name = "rtc"; 122 maa.mb_addr = PMPPC_RTC; 123 maa.mb_irq = PMPPC_I_RTC_INT; 124 config_found(self, &maa, mainbus_print, 125 CFARGS(.submatch = mainbus_submatch)); 126 } 127 128 if (a_config.a_has_eth) { 129 maa.mb_name = "cs"; 130 maa.mb_addr = PMPPC_CS_IO_BASE; 131 maa.mb_irq = PMPPC_I_ETH_INT; 132 config_found(self, &maa, mainbus_print, 133 CFARGS(.submatch = mainbus_submatch)); 134 maa.mb_bt = &pmppc_mem_tag; 135 } 136 if (a_config.a_flash_width != 0) { 137 maa.mb_name = "flash"; 138 maa.mb_addr = PMPPC_FLASH_BASE; 139 maa.mb_irq = MAINBUSCF_IRQ_DEFAULT; 140 maa.u.mb_flash.size = a_config.a_flash_size; 141 maa.u.mb_flash.width = a_config.a_flash_width; 142 config_found(self, &maa, mainbus_print, 143 CFARGS(.submatch = mainbus_submatch)); 144 } 145 146 maa.mb_name = "cpc"; 147 maa.mb_addr = MAINBUSCF_ADDR_DEFAULT; 148 maa.mb_irq = MAINBUSCF_IRQ_DEFAULT; 149 config_found(self, &maa, mainbus_print, CFARGS_NONE); 150} 151 152static int cpu_match(device_t, cfdata_t, void *); 153static void cpu_attach(device_t, device_t, void *); 154 155CFATTACH_DECL_NEW(cpu, 0, 156 cpu_match, cpu_attach, NULL, NULL); 157 158extern struct cfdriver cpu_cd; 159 160int 161cpu_match(device_t parent, cfdata_t cf, void *aux) 162{ 163 struct mainbus_attach_args *maa = aux; 164 165 if (strcmp(maa->mb_name, cpu_cd.cd_name) != 0) 166 return 0; 167 168 if (cpu_info[0].ci_dev != NULL) 169 return 0; 170 171 return 1; 172} 173 174void 175cpu_attach(device_t parent, device_t self, void *aux) 176{ 177 (void) cpu_attach_common(self, 0); 178} 179