1/* $NetBSD: machdep.c,v 1.8 2024/03/05 14:15:31 thorpej Exp $ */ 2 3/* 4 * Copyright 2000, 2001 5 * Broadcom Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and copied only 8 * in accordance with the following terms and conditions. Subject to these 9 * conditions, you may download, copy, install, use, modify and distribute 10 * modified or unmodified copies of this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce and 14 * retain this copyright notice and list of conditions as they appear in 15 * the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Broadcom Corporation. The "Broadcom Corporation" name may not be 19 * used to endorse or promote products derived from this software 20 * without the prior written permission of Broadcom Corporation. 21 * 22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/* 36 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions, and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58 */ 59 60#include <sys/cdefs.h> 61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.8 2024/03/05 14:15:31 thorpej Exp $"); 62 63#include "opt_ddb.h" 64#include "opt_execfmt.h" 65#include "opt_modular.h" 66 67#include <sys/param.h> 68#include <sys/buf.h> 69#include <sys/conf.h> 70#include <sys/cpu.h> 71#include <sys/device.h> 72#include <sys/exec.h> 73#include <sys/file.h> 74#include <sys/intr.h> 75#include <sys/kcore.h> 76#include <sys/kernel.h> 77#include <sys/ksyms.h> 78#include <sys/mbuf.h> 79#include <sys/mount.h> 80#include <sys/msgbuf.h> 81#include <sys/proc.h> 82#include <sys/reboot.h> 83#include <sys/syscallargs.h> 84#include <sys/systm.h> 85 86#include <uvm/uvm_extern.h> 87 88#include <mips/locore.h> 89#include <mips/psl.h> 90#include <mips/pte.h> 91#include <mips/reg.h> 92 93#include <mips/cfe/cfe_api.h> 94 95#include <evbmips/sbmips/autoconf.h> 96#include <evbmips/sbmips/swarm.h> 97#include <evbmips/sbmips/systemsw.h> 98 99#if 0 /* XXXCGD */ 100#include <evbmips/sbmips/nvram.h> 101#endif /* XXXCGD */ 102#include <evbmips/sbmips/leds.h> 103 104#include <mips/sibyte/dev/sbbuswatchvar.h> 105 106#include "ksyms.h" 107 108#if NKSYMS || defined(DDB) || defined(MODULAR) 109#include <mips/db_machdep.h> 110#include <ddb/db_access.h> 111#include <ddb/db_sym.h> 112#include <ddb/db_extern.h> 113#include <sys/exec_elf.h> 114#endif 115 116#include <dev/cons.h> 117 118#if NKSYMS || defined(DDB) || defined(MODULAR) 119/* start and end of kernel symbol table */ 120void *ksym_start, *ksym_end; 121#endif 122 123/* Maps for VM objects. */ 124struct vm_map *phys_map = NULL; 125 126char bootstring[512]; /* Boot command */ 127int netboot; /* Are we netbooting? */ 128int cfe_present; 129 130struct bootinfo_v1 bootinfo; 131 132phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; 133int mem_cluster_cnt; 134 135void configure(void); 136void mach_init(long, long, long, long); 137 138extern void *esym; 139 140#ifdef _LP64 141/* 142 * We do this KSEG0 to PHYS to KSEG0 dance if running 64-bit because 143 * CFE passes in parameters as 32-bit addresses. When used as a 64-bit 144 * address these CFE parameters are in user (XKUSEG) space and can't be 145 * accessed! Convert these to a physical address and and then to the 146 * proper KSEG0 address so we can use them in the kernel. 147 */ 148#define CFE_TO_KERNEL_PTR(x) MIPS_PHYS_TO_KSEG0(MIPS_KSEG0_TO_PHYS(x)) 149#else 150#define CFE_TO_KERNEL_PTR(x) (x) 151#endif 152 153/* 154 * Do all the stuff that locore normally does before calling main(). 155 */ 156void 157mach_init(long fwhandle, long magic, long bootdata, long reserved) 158{ 159 void *kernend; 160 extern char edata[], end[]; 161 uint32_t config; 162 163 /* XXX this code must run on the target CPU */ 164 config = mips3_cp0_config_read(); 165 config &= ~MIPS3_CONFIG_K0_MASK; 166 config |= 0x05; /* XXX. cacheable coherent */ 167 mips3_cp0_config_write(config); 168 169 /* Zero BSS. XXXCGD: uh, is this really necessary still? */ 170 memset(edata, 0, end - edata); 171 172 /* 173 * Copy the bootinfo structure from the boot loader. 174 * this has to be done before mips_vector_init is 175 * called because we may need CFE's TLB handler 176 */ 177 178 if (magic == BOOTINFO_MAGIC) 179 memcpy(&bootinfo, (struct bootinfo_v1 *)bootdata, 180 sizeof bootinfo); 181 else if (reserved == CFE_EPTSEAL) { 182 magic = BOOTINFO_MAGIC; 183 memset(&bootinfo, 0, sizeof bootinfo); 184 bootinfo.version = BOOTINFO_VERSION; 185 bootinfo.fwhandle = fwhandle; 186 bootinfo.fwentry = bootdata; 187 bootinfo.ssym = (vaddr_t)end; 188 bootinfo.esym = (vaddr_t)end; 189 } 190 191 kernend = (void *)mips_round_page(end); 192#if NKSYMS || defined(DDB) || defined(MODULAR) 193 if (magic == BOOTINFO_MAGIC) { 194 ksym_start = (void *)CFE_TO_KERNEL_PTR(bootinfo.ssym); 195 ksym_end = (void *)CFE_TO_KERNEL_PTR(bootinfo.esym); 196 kernend = (void *)mips_round_page((vaddr_t)ksym_end); 197 } 198#endif 199 200 consinit(); 201 202 uvm_md_init(); 203 204 /* 205 * Copy exception-dispatch code down to exception vector. 206 * Initialize locore-function vector. 207 * Clear out the I and D caches. 208 */ 209#ifdef MULTIPROCESSOR 210 mips_vector_init(NULL, true); 211#else 212 mips_vector_init(NULL, false); 213#endif 214 215 mips_locoresw.lsw_bus_error = sibyte_bus_watch_check; 216 217 sb1250_ipl_map_init(); 218 219#ifdef DEBUG 220 printf("fwhandle=%08X magic=%08X bootdata=%08X reserved=%08X\n", 221 (u_int)fwhandle, (u_int)magic, (u_int)bootdata, (u_int)reserved); 222#endif 223 224 cpu_setmodel("sb1250"); 225 226 if (magic == BOOTINFO_MAGIC) { 227 int idx; 228 int added; 229 uint64_t start, len, type; 230 231 cfe_init(CFE_TO_KERNEL_PTR(bootinfo.fwhandle), 232 CFE_TO_KERNEL_PTR(bootinfo.fwentry)); 233 cfe_present = 1; 234 235 idx = 0; 236 physmem = 0; 237 mem_cluster_cnt = 0; 238 while (cfe_enummem(idx, 0, &start, &len, &type) == 0) { 239 added = 0; 240 printf("Memory Block #%d start %08"PRIx64" len %08"PRIx64": %s: ", 241 idx, start, len, (type == CFE_MI_AVAILABLE) ? 242 "Available" : "Reserved"); 243 if ((type == CFE_MI_AVAILABLE) && 244 (mem_cluster_cnt < VM_PHYSSEG_MAX)) { 245 /* 246 * XXX Ignore memory above 256MB for now, it 247 * XXX needs special handling. 248 */ 249 if (start < (256*1024*1024)) { 250 physmem += btoc(((int) len)); 251 mem_clusters[mem_cluster_cnt].start = 252 (long) start; 253 mem_clusters[mem_cluster_cnt].size = 254 (long) len; 255 mem_cluster_cnt++; 256 added = 1; 257 } 258 } 259 if (added) 260 printf("added to map\n"); 261 else 262 printf("not added to map\n"); 263 idx++; 264 } 265 266 } else { 267 /* 268 * Handle the case of not being called from the firmware. 269 */ 270 /* XXX hardwire to 32MB; should be kernel config option */ 271 physmem = 32 * 1024 * 1024 / 4096; 272 mem_clusters[0].start = 0; 273 mem_clusters[0].size = ctob(physmem); 274 mem_cluster_cnt = 1; 275 } 276 277 278 for (u_int i = 0; i < sizeof(bootinfo.boot_flags); i++) { 279 switch (bootinfo.boot_flags[i]) { 280 case '\0': 281 break; 282 case ' ': 283 continue; 284 case '-': 285 while (bootinfo.boot_flags[i] != ' ' && 286 bootinfo.boot_flags[i] != '\0') { 287 switch (bootinfo.boot_flags[i]) { 288 case 'a': 289 boothowto |= RB_ASKNAME; 290 break; 291 case 'd': 292 boothowto |= RB_KDB; 293 break; 294 case 's': 295 boothowto |= RB_SINGLE; 296 break; 297 } 298 i++; 299 } 300 } 301 } 302 303 /* 304 * Load the rest of the available pages into the VM system. 305 */ 306 mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend, 307 mem_clusters, mem_cluster_cnt, NULL, 0); 308 309 /* 310 * Initialize error message buffer (at end of core). 311 */ 312 mips_init_msgbuf(); 313 314 pmap_bootstrap(); 315 316 /* 317 * Allocate uarea for lwp0 and set it. 318 */ 319 mips_init_lwp0_uarea(); 320 321 /* 322 * Initialize debuggers, and break into them, if appropriate. 323 */ 324#if NKSYMS || defined(DDB) || defined(MODULAR) 325 ksyms_addsyms_elf(((uintptr_t)ksym_end - (uintptr_t)ksym_start), 326 ksym_start, ksym_end); 327#endif 328 329 if (boothowto & RB_KDB) { 330#if defined(DDB) 331 Debugger(); 332#endif 333 } 334 335#ifdef MULTIPROCESSOR 336 mips_fixup_exceptions(mips_fixup_zero_relative, NULL); 337#endif 338} 339 340/* 341 * Allocate memory for variable-sized tables, 342 */ 343void 344cpu_startup(void) 345{ 346 /* 347 * Just do the common stuff. 348 */ 349 cpu_startup_common(); 350} 351 352int waittime = -1; 353 354void 355cpu_reboot(int howto, char *bootstr) 356{ 357 358 /* Take a snapshot before clobbering any registers. */ 359 savectx(curpcb); 360 361 if (cold) { 362 howto |= RB_HALT; 363 goto haltsys; 364 } 365 366 /* If "always halt" was specified as a boot flag, obey. */ 367 if (boothowto & RB_HALT) 368 howto |= RB_HALT; 369 370 boothowto = howto; 371 if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) { 372 waittime = 0; 373 vfs_shutdown(); 374 } 375 376 splhigh(); 377 378 if (howto & RB_DUMP) 379 dumpsys(); 380 381haltsys: 382 doshutdownhooks(); 383 384 pmf_system_shutdown(boothowto); 385 386 if (howto & RB_HALT) { 387 printf("\n"); 388 printf("The operating system has halted.\n"); 389 printf("Please press any key to reboot.\n\n"); 390 cnpollc(1); /* For proper keyboard command handling */ 391 cngetc(); 392 cnpollc(0); 393 } 394 395 printf("rebooting...\n\n"); 396 397 if (cfe_present) { 398 /* 399 * XXX 400 * For some reason we can't return to CFE with 401 * and do a warm start. Need to look into this... 402 */ 403 cfe_exit(0, (howto & RB_DUMP) ? 1 : 0); 404 printf("cfe_exit didn't!\n"); 405 } 406 407 printf("WARNING: reboot failed!\n"); 408 409 for (;;); 410} 411 412static void 413cswarm_setled(u_int index, char c) 414{ 415 volatile u_char *led_ptr = 416 (void *)MIPS_PHYS_TO_KSEG1(SWARM_LEDS_PHYS); 417 418 if (index < 4) 419 led_ptr[0x20 + ((3 - index) << 3)] = c; 420} 421 422void 423cswarm_setleds(const char *str) 424{ 425 int i; 426 427 for (i = 0; i < 4 && str[i]; i++) 428 cswarm_setled(i, str[i]); 429 for (; i < 4; i++) 430 cswarm_setled(' ', str[i]); 431} 432 433int 434sbmips_cca_for_pa(paddr_t pa) 435{ 436 int rv; 437 438 rv = 2; /* Uncached. */ 439 440 /* Check each DRAM region. */ 441 if ((pa >= 0x0000000000 && pa <= 0x000fffffff) || /* DRAM 0 */ 442 (pa >= 0x0080000000 && pa <= 0x008fffffff) || /* DRAM 1 */ 443 (pa >= 0x0090000000 && pa <= 0x009fffffff) || /* DRAM 2 */ 444 (pa >= 0x00c0000000 && pa <= 0x00cfffffff) || /* DRAM 3 */ 445#ifdef _MIPS_PADDR_T_64BIT 446 (pa >= 0x0100000000LL && pa <= 0x07ffffffffLL) || /* DRAM exp */ 447#endif 448 0) { 449 rv = 5; /* Cacheable coherent. */ 450 } 451 452 return (rv); 453} 454