1/* $NetBSD: mainbus.c,v 1.18 2023/12/20 14:12:25 thorpej Exp $ */ 2 3/* 4 * Copyright 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#include <sys/cdefs.h> 39__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.18 2023/12/20 14:12:25 thorpej Exp $"); 40 41#include "opt_pci.h" 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/device.h> 46 47#include <dev/pci/pcivar.h> 48#if defined(PCI_NETBSD_CONFIGURE) 49#include <dev/pci/pciconf.h> 50#endif 51 52#include <mips/cache.h> 53#include <mips/cpuregs.h> 54 55#include <evbmips/malta/autoconf.h> 56#include <evbmips/malta/maltareg.h> 57#include <evbmips/malta/maltavar.h> 58 59#if defined(PCI_NETBSD_ENABLE_IDE) 60#include <dev/pci/pciide_piix_reg.h> 61#endif /* PCI_NETBSD_ENABLE_IDE */ 62 63#include "locators.h" 64#include "pci.h" 65 66static int mainbus_match(device_t, cfdata_t, void *); 67static void mainbus_attach(device_t, device_t, void *); 68static int mainbus_submatch(device_t, cfdata_t, const int *, void *); 69static int mainbus_print(void *, const char *); 70 71CFATTACH_DECL_NEW(mainbus, 0, 72 mainbus_match, mainbus_attach, NULL, NULL); 73 74/* There can be only one. */ 75bool mainbus_found; 76 77struct mainbusdev { 78 const char *md_name; 79 bus_addr_t md_addr; 80 int md_intr; 81}; 82 83const struct mainbusdev mainbusdevs[] = { 84 { "cpu", -1, -1 }, 85 { "gt", MALTA_CORECTRL_BASE, -1 }, 86 { "com", MALTA_CBUSUART, MALTA_CBUSUART_INTR }, 87 { "i2c", MALTA_I2C_BASE, -1 }, 88 { "gpio", MALTA_GPIO_BASE, -1 }, 89 { NULL, 0, 0 }, 90}; 91 92#define PCI_IO_START 0x00001000 93#define PCI_IO_END 0x0000efff 94#define PCI_IO_SIZE ((PCI_IO_END - PCI_IO_START) + 1) 95 96#define PCI_MEM_START MALTA_PCIMEM1_BASE 97#define PCI_MEM_SIZE MALTA_PCIMEM1_SIZE 98 99static int 100mainbus_match(device_t parent, cfdata_t match, void *aux) 101{ 102 103 if (mainbus_found) 104 return (0); 105 106 return (1); 107} 108 109static void 110mainbus_attach(device_t parent, device_t self, void *aux) 111{ 112 struct mainbus_attach_args ma; 113 const struct mainbusdev *md; 114#if defined(PCI_NETBSD_ENABLE_IDE) || defined(PCI_NETBSD_CONFIGURE) 115 struct malta_config *mcp = &malta_configuration; 116 pci_chipset_tag_t pc = &mcp->mc_pc; 117#endif 118 119 mainbus_found = true; 120 printf("\n"); 121 122#if defined(PCI_NETBSD_CONFIGURE) 123 struct mips_cache_info * const mci = &mips_cache_info; 124 struct pciconf_resources *pcires = pciconf_resource_init(); 125 126 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 127 PCI_IO_START, PCI_IO_SIZE); 128 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 129 PCI_MEM_START, PCI_MEM_SIZE); 130 131 pci_configure_bus(pc, pcires, 0, mci->mci_dcache_align); 132 pciconf_resource_fini(pcires); 133#endif /* PCI_NETBSD_CONFIGURE */ 134 135#if defined(PCI_NETBSD_ENABLE_IDE) 136 /* 137 * Perhaps PMON has not enabled the IDE controller. Easy to 138 * fix -- just set the ENABLE bits for each channel in the 139 * IDETIM register. Just clear all the bits for the channel 140 * except for the ENABLE bits -- the `pciide' driver will 141 * properly configure it later. 142 */ 143 pcireg_t idetim = 0; 144 if (PCI_NETBSD_ENABLE_IDE & 0x01) 145 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 0); 146 if (PCI_NETBSD_ENABLE_IDE & 0x02) 147 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 1); 148 149 /* pciide0 is pci device 10, function 1 */ 150 pcitag_t idetag = pci_make_tag(pc, 0, 10, 1); 151 pci_conf_write(pc, idetag, PIIX_IDETIM, idetim); 152#endif 153 for (md = mainbusdevs; md->md_name != NULL; md++) { 154 ma.ma_name = md->md_name; 155 ma.ma_addr = md->md_addr; 156 ma.ma_intr = md->md_intr; 157 config_found(self, &ma, mainbus_print, 158 CFARGS(.submatch = mainbus_submatch)); 159 } 160} 161 162static int 163mainbus_submatch(device_t parent, cfdata_t cf, 164 const int *ldesc, void *aux) 165{ 166 struct mainbus_attach_args *ma = aux; 167 168 if (cf->cf_loc[MAINBUSCF_ADDR] != MAINBUSCF_ADDR_DEFAULT && 169 cf->cf_loc[MAINBUSCF_ADDR] != ma->ma_addr) 170 return (0); 171 172 return (config_match(parent, cf, aux)); 173} 174 175static int 176mainbus_print(void *aux, const char *pnp) 177{ 178 struct mainbus_attach_args *ma = aux; 179 180 if (pnp != 0) 181 return QUIET; 182 183 if (pnp) 184 aprint_normal("%s at %s", ma->ma_name, pnp); 185 if (ma->ma_addr != MAINBUSCF_ADDR_DEFAULT) 186 aprint_normal(" addr 0x%lx", ma->ma_addr); 187 188 return (UNCONF); 189} 190