iq31244_pci.c revision 1.1 
1/*	$NetBSD: iq31244_pci.c,v 1.1 2003/05/14 21:41:34 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed for the NetBSD Project by
20 *	Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38/*
39 * IQ31244 PCI interrupt support.
40 */
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/device.h>
45
46#include <machine/autoconf.h>
47#include <machine/bus.h>
48
49#include <evbarm/iq80321/iq80321reg.h>
50#include <evbarm/iq80321/iq80321var.h>
51
52#include <arm/xscale/i80321reg.h>
53#include <arm/xscale/i80321var.h>
54
55#include <dev/pci/pcidevs.h>
56#include <dev/pci/ppbreg.h>
57
58int	iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
59const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
60const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
61void	*iq80321_pci_intr_establish(void *, pci_intr_handle_t,
62	    int, int (*func)(void *), void *);
63void	iq80321_pci_intr_disestablish(void *, void *);
64
65void
66iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
67{
68
69	pc->pc_intr_v = cookie;		/* the i80321 softc */
70	pc->pc_intr_map = iq80321_pci_intr_map;
71	pc->pc_intr_string = iq80321_pci_intr_string;
72	pc->pc_intr_evcnt = iq80321_pci_intr_evcnt;
73	pc->pc_intr_establish = iq80321_pci_intr_establish;
74	pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
75}
76
77int
78iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
79{
80	struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
81	int b, d, f;
82	uint32_t busno;
83
84	busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
85	busno = PCIXSR_BUSNO(busno);
86	if (busno == 0xff)
87		busno = 0;
88
89	pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
90
91	/* No mappings for devices not on our bus. */
92	if (b != busno)
93		goto no_mapping;
94
95	switch (d) {
96	case 1:			/* PCIX-PCIX bridge */
97		/*
98		 * The S-ATA chips are behind the bridge, and all of
99		 * the S-ATA interrupts are wired together.
100		 */
101		*ihp = ICU_INT_XINT(2);
102		return (0);
103
104	case 2:			/* PCI slot */
105		/* All pins are wired together. */
106		*ihp = ICU_INT_XINT(3);
107		return (0);
108
109	case 3:			/* i82546 dual Gig-E */
110		if (pa->pa_intrpin == 1 || pa->pa_intrpin == 2) {
111			*ihp = ICU_INT_XINT(0);
112			return (0);
113		}
114		goto no_mapping;
115
116	default:
117 no_mapping:
118		printf("iq80321_pci_intr_map: no mapping for %d/%d/%d/%c\n",
119		    pa->pa_bus, pa->pa_device, pa->pa_function,
120		    '@' + pa->pa_intrpin);
121		return (1);
122	}
123
124	return (0);
125}
126
127const char *
128iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
129{
130
131	return (i80321_irqnames[ih]);
132}
133
134const struct evcnt *
135iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
136{
137
138	/* XXX For now. */
139	return (NULL);
140}
141
142void *
143iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
144    int (*func)(void *), void *arg)
145{
146
147	return (i80321_intr_establish(ih, ipl, func, arg));
148}
149
150void
151iq80321_pci_intr_disestablish(void *v, void *cookie)
152{
153
154	i80321_intr_disestablish(cookie);
155}
156