1/*	$NetBSD: gb225var.h,v 1.4 2022/02/16 20:31:43 andvar Exp $ */
2
3/*
4 * Copyright (c) 2002, 2003  Genetec corp.  All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec corp.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of Genetec corp. may not be used to endorse
16 *    or promote products derived from this software without specific prior
17 *    written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _EVBARM_GB225VAR_H
33#define _EVBARM_GB225VAR_H
34
35#include <sys/queue.h>
36#include <sys/callout.h>
37
38/*
39 * Interrupt sources for option board CPLD.
40 */
41#define	OPIO_INTR_CF_INSERT	0
42#define	OPIO_INTR_PCMCIA_INSERT	1
43#define	OPIO_INTR_USB_POWER	2	/* USB power fault */
44#define	OPIO_INTR_CARD_POWER	3	/* PCMCIA/CF power fault */
45#define	N_OPIO_INTR 		4
46
47
48struct opio_intr_handler;
49
50struct opio_softc {
51	device_t sc_dev;
52
53	bus_space_tag_t      sc_iot;
54	bus_space_handle_t   sc_ioh;
55
56	bus_space_handle_t   sc_memctl_ioh;  /* PXA2x0's memory controller */
57
58	void *sc_ih;			/* interrupt handler */
59	/* callout for debounce */
60	struct callout sc_callout;
61
62	enum {ST_STABLE, ST_BOUNCING } sc_debounce;
63
64	struct opio_intr_handler {
65		int (* func)(void *, int);
66		void *arg;
67		int level;
68
69		uint8_t	reported_state;
70		uint8_t last_state;
71		short	debounce_count;
72	} sc_intr[N_OPIO_INTR];
73};
74
75
76void *opio_intr_establish(struct opio_softc *, int, int,
77    int (*)(void *, int), void *);
78
79#endif /* _EVBARM_GB225VAR_H */
80