files.tsarm revision 1.7 
1#	$NetBSD: files.tsarm,v 1.7 2005/02/04 06:02:36 joff Exp $
2#
3# First try for arm-specific configuration info
4#
5
6# Use the generic ARM soft interrupt code.
7file	arch/arm/arm/softintr.c
8file	arch/evbarm/tsarm/tsarm_machdep.c
9
10# EP93xx Processor CPU support
11include "arch/arm/ep93xx/files.ep93xx"
12
13attach epsoc at mainbus
14
15attach epcom at epsoc with epcom_ts
16file	arch/evbarm/tsarm/epcom_ts.c
17
18define  tspldbus {}
19device	tspld: isabus, tspldbus, sysmon_wdog
20attach tspld at mainbus
21file	arch/evbarm/tsarm/tspld.c	tspld
22
23file	arch/evbarm/tsarm/isa/isa_machdep.c	isa
24file	arch/evbarm/tsarm/isa/isa_io.c		isa
25file	arch/evbarm/tsarm/isa/isa_io_asm.S	isa
26
27attach wdc at tspldbus with wdc_ts
28file 	arch/evbarm/tsarm/wdc_ts.c		wdc_ts
29
30device tsrtc: mc146818
31attach tsrtc at tspldbus
32file	arch/evbarm/tsarm/tsrtc.c		tsrtc
33
34device	tslcd: hd44780, wsemuldisplaydev
35attach	tslcd at tspldbus
36file	arch/evbarm/tsarm/tslcd.c		tslcd
37
38device  tskp: matrixkp, wskbddev
39attach	tskp at tspldbus
40file	arch/evbarm/tsarm/tskp.c		tskp
41
42# XXXX pcic here because it needs to be late.  The catch: pcic needs
43# to be late, so devices which attach to it are attached late.  But it
44# needs to be before its isa and pci attachments.  This answer is
45# non-optimal, but I don't have a better answer right now.
46
47# PCIC pcmcia controller
48# XXX this needs to be done very late, so it's done here.  This feels
49# like a kludge, but it might be for the best.
50
51defparam		PCIC_ISA_ALLOC_IOBASE
52defparam		PCIC_ISA_ALLOC_IOSIZE
53defparam		PCIC_ISA_INTR_ALLOC_MASK
54
55device	pcic: pcmciabus
56file	dev/ic/i82365.c			pcic
57
58# PCIC pcmcia controller on ISA bus.
59attach	pcic at isa with pcic_isa
60file	dev/isa/i82365_isa.c		pcic_isa
61
62# Code common to ISA and ISAPnP attachments
63file	dev/isa/i82365_isasubr.c	pcic_isa
64
65# this wants to be probed as late as possible.
66#
67# Machine-independent PCMCIA drivers
68#
69include	"dev/pcmcia/files.pcmcia"
70