1# $NetBSD: files.tsarm,v 1.12 2020/05/23 13:46:36 jmcneill Exp $ 2# 3# First try for arm-specific configuration info 4# 5 6file arch/evbarm/tsarm/tsarm_machdep.c 7 8# EP93xx Processor CPU support 9include "arch/arm/ep93xx/files.ep93xx" 10 11attach epsoc at mainbus 12 13attach epcom at epsoc with epcom_ts 14file arch/evbarm/tsarm/epcom_ts.c 15 16define tspldbus {} 17device tspld: isabus, tspldbus, sysmon_wdog 18attach tspld at mainbus 19file arch/evbarm/tsarm/tspld.c tspld 20 21file arch/evbarm/tsarm/isa/isa_machdep.c isa 22file arch/evbarm/tsarm/isa/isa_io.c isa 23file arch/evbarm/tsarm/isa/isa_io_asm.S isa 24 25attach wdc at tspldbus with wdc_ts 26file arch/evbarm/tsarm/wdc_ts.c wdc_ts 27 28device tsrtc: mc146818 29attach tsrtc at tspldbus 30file arch/evbarm/tsarm/tsrtc.c tsrtc 31 32device tslcd: hd44780, wsemuldisplaydev 33attach tslcd at tspldbus 34file arch/evbarm/tsarm/tslcd.c tslcd 35 36device tskp: matrixkp, wskbddev 37attach tskp at tspldbus 38file arch/evbarm/tsarm/tskp.c tskp 39 40# XXXX pcic here because it needs to be late. The catch: pcic needs 41# to be late, so devices which attach to it are attached late. But it 42# needs to be before its isa and pci attachments. This answer is 43# non-optimal, but I don't have a better answer right now. 44 45# PCIC pcmcia controller 46# XXX this needs to be done very late, so it's done here. This feels 47# like a kludge, but it might be for the best. 48 49defparam PCIC_ISA_ALLOC_IOBASE 50defparam PCIC_ISA_ALLOC_IOSIZE 51defparam PCIC_ISA_INTR_ALLOC_MASK 52 53device pcic: pcmciabus 54file dev/ic/i82365.c pcic 55 56# PCIC pcmcia controller on ISA bus. 57attach pcic at isa with pcic_isa 58file dev/isa/i82365_isa.c pcic_isa 59 60# Code common to ISA and ISAPnP attachments 61file dev/isa/i82365_isasubr.c pcic_isa 62