1/* $NetBSD: bus.c,v 1.46 2018/01/20 13:56:08 skrll Exp $ */ 2 3/* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* 34 * Platform-specific I/O support for the cobalt machines 35 */ 36 37#include <sys/cdefs.h> 38__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.46 2018/01/20 13:56:08 skrll Exp $"); 39 40#include <sys/types.h> 41#include <sys/param.h> 42#include <sys/bus.h> 43 44#define CHIP mainbus 45#define CHIP_MEM /* defined */ 46 47#if 0 48#define CHIP_EX_MALLOC_SAFE(v) (((struct p4032_config *)(v))->ac_mallocsafe) 49#define CHIP_EXTENT(v) (((struct p4032_config *)(v))->ac_io_ex) 50#endif 51 52/* IO region 1 */ 53#define CHIP_W1_BUS_START(v) 0x10000000UL 54#define CHIP_W1_BUS_END(v) 0x10000fffUL 55#define CHIP_W1_SYS_START(v) 0x10000000UL 56#define CHIP_W1_SYS_END(v) 0x10000fffUL 57 58/* IO region 1 */ 59#define CHIP_W2_BUS_START(v) 0x14000000UL 60#define CHIP_W2_BUS_END(v) 0x1fffffffUL 61#define CHIP_W2_SYS_START(v) 0x14000000UL 62#define CHIP_W2_SYS_END(v) 0x1fffffffUL 63 64void mainbus_bus_mem_init(bus_space_tag_t, void *); 65 66#include <mips/mips/bus_space_alignstride_chipdep.c> 67