dma.h revision 1.3 
1/*	$NetBSD: dma.h,v 1.3 1995/04/22 22:18:57 leo Exp $	*/
2
3/*
4 * Copyright (c) 1995 Leo Weppelman.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *      This product includes software developed by Leo Weppelman.
18 * 4. The name of the author may not be used to endorse or promote products
19 *    derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#ifndef _MACHINE_DMA_H
34#define _MACHINE_DMA_H
35
36/*
37 * Atari TT hardware:
38 * FDC/ACSI DMA circuitry
39 */
40
41#define	DMA	((struct dma *)AD_DMA)
42
43struct dma {
44	volatile short	  dma_gap[2];	/* reserved			*/
45	volatile u_short  dma_data;	/* controller data path		*/
46	volatile u_short  dma_mode;	/* mode register		*/
47	volatile u_char   dma_addr[6];	/* base address H/M/L		*/
48	volatile u_short  dma_drvmode;	/* floppy density settings	*/
49};
50
51#define	dma_nsec      dma_data		/* sector count			*/
52#define	dma_stat      dma_mode		/* status register		*/
53
54/*
55 * Mode register bits
56 */
57/*			0x0001		*//* not used			*/
58#define	DMA_A0		0x0002		/* signal A0 to fdc/hdc		*/
59#define	DMA_A1		0x0004		/* signal A1 to fdc/hdc		*/
60#define	DMA_HDC		0x0008		/* must be on if accessing hdc	*/
61#define	DMA_SCREG	0x0010		/* access sector count register	*/
62/*			0x0020		*//* reserved			*/
63#define	DMA_NODMA	0x0040		/* no DMA (yet)			*/
64#define	DMA_FDC		0x0080		/* must be on if accessing fdc	*/
65#define	DMA_WRBIT	0x0100		/* write to fdc/hdc via dma_data*/
66#define	DMA_SCSI	0x0088		/* select 5380 chip		*/
67
68/*
69 * Status register bits
70 */
71#define	DMAOK	0x0001		/* something wrong			*/
72#define	SCNOT0	0x0002		/* sector count not 0			*/
73#define	DATREQ	0x0004		/* FDC data request signal		*/
74
75/*
76 * Indices into dma_addr.
77 * Access low byte of 16 bits.
78 * Fill low/mid/high in this order.
79 */
80#define	AD_HIGH	1
81#define	AD_MID	3
82#define	AD_LOW	5
83
84/*
85 * Defines for 'dmadrv_mode'.
86 */
87#define	FDC_HDSET	1	/* Set FDC for High density		*/
88#define	FDC_HDSIG	2	/* Signal HD present to drive		*/
89
90#ifdef _KERNEL
91int  st_dmagrab __P((void (*)(), void (*)(), void *, int));
92void st_dmafree __P((void));
93int  st_dmawanted __P((void));
94void st_dmaaddr __P((caddr_t));
95void st_dmacomm __P((int, int));
96#endif /* _KERNEL	*/
97
98#endif /* _MACHINE_DMA_H */
99