wdc_mb.c revision 1.34
1/* $NetBSD: wdc_mb.c,v 1.34 2009/03/08 05:25:31 tsutsui Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <sys/cdefs.h> 33__KERNEL_RCSID(0, "$NetBSD: wdc_mb.c,v 1.34 2009/03/08 05:25:31 tsutsui Exp $"); 34 35#include <sys/types.h> 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/malloc.h> 39#include <sys/device.h> 40 41#include <sys/bswap.h> 42#include <machine/cpu.h> 43#include <machine/bus.h> 44#include <machine/iomap.h> 45#include <machine/mfp.h> 46#include <machine/dma.h> 47 48#include <dev/ata/atavar.h> 49#include <dev/ic/wdcvar.h> 50 51#include <m68k/asm_single.h> 52 53#include <atari/dev/ym2149reg.h> 54#include <atari/atari/device.h> 55 56/* Falcon IDE register locations (base and offsets). */ 57#define FALCON_WD_BASE 0xfff00000 58#define FALCON_WD_LEN 0x40 59#define FALCON_WD_AUX 0x38 60 61/* 62 * XXX This code currently doesn't even try to allow 32-bit data port use. 63 */ 64static int claim_hw(struct ata_channel *, int); 65static void free_hw(struct ata_channel *); 66static void read_multi_2_swap(bus_space_tag_t, bus_space_handle_t, 67 bus_size_t, uint16_t *, bus_size_t); 68static void write_multi_2_swap(bus_space_tag_t, bus_space_handle_t, 69 bus_size_t, const uint16_t *, bus_size_t); 70 71struct wdc_mb_softc { 72 struct wdc_softc sc_wdcdev; 73 struct ata_channel *sc_chanlist[1]; 74 struct ata_channel sc_channel; 75 struct ata_queue sc_chqueue; 76 struct wdc_regs sc_wdc_regs; 77 void *sc_ih; 78}; 79 80int wdc_mb_probe(device_t, struct cfdata *, void *); 81void wdc_mb_attach(device_t, device_t, void *); 82 83CFATTACH_DECL_NEW(wdc_mb, sizeof(struct wdc_mb_softc), 84 wdc_mb_probe, wdc_mb_attach, NULL, NULL); 85 86int 87wdc_mb_probe(device_t parent, cfdata_t cfp, void *aux) 88{ 89 static int wdc_matched = 0; 90 struct ata_channel ch; 91 struct wdc_softc wdc; 92 struct wdc_regs wdr; 93 int result = 0, i; 94 uint8_t sv_ierb; 95 96 if ((machineid & ATARI_TT) || strcmp("wdc", aux) || wdc_matched) 97 return 0; 98 if (!atari_realconfig) 99 return 0; 100 101 memset(&wdc, 0, sizeof(wdc)); 102 memset(&ch, 0, sizeof(ch)); 103 ch.ch_atac = &wdc.sc_atac; 104 wdc.regs = &wdr; 105 106 wdr.cmd_iot = wdr.ctl_iot = mb_alloc_bus_space_tag(); 107 if (wdr.cmd_iot == NULL) 108 return 0; 109 wdr.cmd_iot->stride = 0; 110 wdr.cmd_iot->wo_1 = 1; 111 112 if (bus_space_map(wdr.cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0, 113 &wdr.cmd_baseioh)) 114 goto out; 115 for (i = 0; i < WDC_NREG; i++) { 116 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, 117 i * 4, 4, &wdr.cmd_iohs[i]) != 0) 118 goto outunmap; 119 } 120 wdc_init_shadow_regs(&ch); 121 122 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_AUX, 4, 123 &wdr.ctl_ioh)) 124 goto outunmap; 125 126 /* 127 * Make sure IDE interrupts are disabled during probing. 128 */ 129 sv_ierb = MFP->mf_ierb; 130 MFP->mf_ierb &= ~IB_DINT; 131 132 /* 133 * Make sure that IDE is turned on on the Falcon. 134 */ 135 if (machineid & ATARI_FALCON) 136 ym2149_ser2(0); 137 138 result = wdcprobe(&ch); 139 140 MFP->mf_ierb = sv_ierb; 141 142 outunmap: 143 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_LEN); 144 out: 145 mb_free_bus_space_tag(wdr.cmd_iot); 146 147 if (result) 148 wdc_matched = 1; 149 return result; 150} 151 152void 153wdc_mb_attach(device_t parent, device_t self, void *aux) 154{ 155 struct wdc_mb_softc *sc = device_private(self); 156 struct wdc_regs *wdr; 157 int i; 158 159 aprint_normal("\n"); 160 161 sc->sc_wdcdev.sc_atac.atac_dev = self; 162 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 163 wdr->cmd_iot = wdr->ctl_iot = 164 mb_alloc_bus_space_tag(); 165 wdr->cmd_iot->stride = 0; 166 wdr->cmd_iot->wo_1 = 1; 167 wdr->cmd_iot->abs_rms_2 = read_multi_2_swap; 168 wdr->cmd_iot->abs_wms_2 = write_multi_2_swap; 169 if (bus_space_map(wdr->cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0, 170 &wdr->cmd_baseioh)) { 171 aprint_error_dev(self, "couldn't map registers\n"); 172 return; 173 } 174 for (i = 0; i < WDC_NREG; i++) { 175 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 176 i * 4, 4, &wdr->cmd_iohs[i]) != 0) { 177 aprint_error_dev(self, 178 "couldn't subregion cmd reg %i\n", i); 179 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 180 FALCON_WD_LEN); 181 return; 182 } 183 } 184 185 if (bus_space_subregion(wdr->cmd_iot, 186 wdr->cmd_baseioh, FALCON_WD_AUX, 4, &wdr->ctl_ioh)) { 187 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, FALCON_WD_LEN); 188 aprint_error_dev(self, "couldn't subregion aux reg\n"); 189 return; 190 } 191 192 /* 193 * Play a nasty trick here. Normally we only manipulate the 194 * interrupt *mask*. However to defeat wd_get_parms(), we 195 * disable the interrupts here using the *enable* register. 196 */ 197 MFP->mf_ierb &= ~IB_DINT; 198 199 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | 200 ATAC_CAP_ATA_NOSTREAM; 201 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 202 sc->sc_wdcdev.sc_atac.atac_claim_hw = &claim_hw; 203 sc->sc_wdcdev.sc_atac.atac_free_hw = &free_hw; 204 sc->sc_chanlist[0] = &sc->sc_channel; 205 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist; 206 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 207 sc->sc_channel.ch_channel = 0; 208 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac; 209 sc->sc_channel.ch_queue = &sc->sc_chqueue; 210 sc->sc_channel.ch_ndrive = 2; 211 wdc_init_shadow_regs(&sc->sc_channel); 212 213 /* 214 * Setup & enable disk related interrupts. 215 */ 216 MFP->mf_ierb |= IB_DINT; 217 MFP->mf_iprb = (uint8_t)~IB_DINT; 218 MFP->mf_imrb |= IB_DINT; 219 220 wdcattach(&sc->sc_channel); 221} 222 223/* 224 * Hardware locking 225 */ 226static int wd_lock; 227 228static int 229claim_hw(struct ata_channel *chp, int maysleep) 230{ 231 232 if (wd_lock != DMA_LOCK_GRANT) { 233 if (wd_lock == DMA_LOCK_REQ) { 234 /* 235 * ST_DMA access is being claimed. 236 */ 237 return 0; 238 } 239 if (!st_dmagrab((dma_farg)wdcintr, 240 (dma_farg)(maysleep ? NULL : wdcrestart), chp, 241 &wd_lock, 1)) 242 return 0; 243 } 244 return 1; 245} 246 247static void 248free_hw(struct ata_channel *chp) 249{ 250 251 /* 252 * Flush pending interrupts before giving-up lock 253 */ 254 MFP->mf_iprb = (uint8_t)~IB_DINT; 255 256 /* 257 * Only free the lock on a Falcon. On the Hades, keep it. 258 */ 259/* if (machineid & ATARI_FALCON) */ 260 st_dmafree(chp, &wd_lock); 261} 262 263/* 264 * XXX 265 * This piece of uglyness is caused by the fact that the byte lanes of 266 * the data-register are swapped on the atari. This works OK for an IDE 267 * disk, but turns into a nightmare when used on atapi devices. 268 */ 269#define calc_addr(base, off, stride, wm) \ 270 ((u_long)(base) + ((off) << (stride)) + (wm)) 271 272static void 273read_multi_2_swap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 274 uint16_t *a, bus_size_t c) 275{ 276 volatile uint16_t *ba; 277 278 ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2); 279 for (; c; a++, c--) 280 *a = bswap16(*ba); 281} 282 283static void 284write_multi_2_swap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 285 const uint16_t *a, bus_size_t c) 286{ 287 volatile uint16_t *ba; 288 289 ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2); 290 for (; c; a++, c--) 291 *ba = bswap16(*a); 292} 293