wdc_mb.c revision 1.31
1/* $NetBSD: wdc_mb.c,v 1.31 2008/03/18 20:46:35 cube Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__KERNEL_RCSID(0, "$NetBSD: wdc_mb.c,v 1.31 2008/03/18 20:46:35 cube Exp $"); 41 42#include <sys/types.h> 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/malloc.h> 46#include <sys/device.h> 47 48#include <sys/bswap.h> 49#include <machine/cpu.h> 50#include <machine/bus.h> 51#include <machine/iomap.h> 52#include <machine/mfp.h> 53#include <machine/dma.h> 54 55#include <dev/ata/atavar.h> 56#include <dev/ic/wdcvar.h> 57 58#include <m68k/asm_single.h> 59 60#include <atari/dev/ym2149reg.h> 61#include <atari/atari/device.h> 62 63/* Falcon IDE register locations (base and offsets). */ 64#define FALCON_WD_BASE 0xfff00000 65#define FALCON_WD_LEN 0x40 66#define FALCON_WD_AUX 0x38 67 68/* 69 * XXX This code currently doesn't even try to allow 32-bit data port use. 70 */ 71static int claim_hw (struct ata_channel *, int); 72static void free_hw (struct ata_channel *); 73static void read_multi_2_swap (bus_space_tag_t, bus_space_handle_t, 74 bus_size_t, u_int16_t *, bus_size_t); 75static void write_multi_2_swap (bus_space_tag_t, bus_space_handle_t, 76 bus_size_t, const u_int16_t *, bus_size_t); 77 78struct wdc_mb_softc { 79 struct wdc_softc sc_wdcdev; 80 struct ata_channel *sc_chanlist[1]; 81 struct ata_channel sc_channel; 82 struct ata_queue sc_chqueue; 83 struct wdc_regs sc_wdc_regs; 84 void *sc_ih; 85}; 86 87int wdc_mb_probe (device_t, struct cfdata *, void *); 88void wdc_mb_attach (device_t, device_t, void *); 89 90CFATTACH_DECL_NEW(wdc_mb, sizeof(struct wdc_mb_softc), 91 wdc_mb_probe, wdc_mb_attach, NULL, NULL); 92 93int 94wdc_mb_probe(device_t parent, cfdata_t cfp, void *aux) 95{ 96 static int wdc_matched = 0; 97 struct ata_channel ch; 98 struct wdc_softc wdc; 99 struct wdc_regs wdr; 100 int result = 0, i; 101 u_char sv_ierb; 102 103 if ((machineid & ATARI_TT) || strcmp("wdc", aux) || wdc_matched) 104 return 0; 105 if (!atari_realconfig) 106 return 0; 107 108 memset(&wdc, 0, sizeof(wdc)); 109 memset(&ch, 0, sizeof(ch)); 110 ch.ch_atac = &wdc.sc_atac; 111 wdc.regs = &wdr; 112 113 wdr.cmd_iot = wdr.ctl_iot = mb_alloc_bus_space_tag(); 114 if (wdr.cmd_iot == NULL) 115 return 0; 116 wdr.cmd_iot->stride = 0; 117 wdr.cmd_iot->wo_1 = 1; 118 119 if (bus_space_map(wdr.cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0, 120 &wdr.cmd_baseioh)) 121 goto out; 122 for (i = 0; i < WDC_NREG; i++) { 123 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, 124 i * 4, 4, &wdr.cmd_iohs[i]) != 0) 125 goto outunmap; 126 } 127 wdc_init_shadow_regs(&ch); 128 129 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_AUX, 4, 130 &wdr.ctl_ioh)) 131 goto outunmap; 132 133 /* 134 * Make sure IDE interrupts are disabled during probing. 135 */ 136 sv_ierb = MFP->mf_ierb; 137 MFP->mf_ierb &= ~IB_DINT; 138 139 /* 140 * Make sure that IDE is turned on on the Falcon. 141 */ 142 if (machineid & ATARI_FALCON) 143 ym2149_ser2(0); 144 145 result = wdcprobe(&ch); 146 147 MFP->mf_ierb = sv_ierb; 148 149 outunmap: 150 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_LEN); 151 out: 152 mb_free_bus_space_tag(wdr.cmd_iot); 153 154 if (result) 155 wdc_matched = 1; 156 return (result); 157} 158 159void 160wdc_mb_attach(device_t parent, device_t self, void *aux) 161{ 162 struct wdc_mb_softc *sc = device_private(self); 163 struct wdc_regs *wdr; 164 int i; 165 166 aprint_normal("\n"); 167 168 sc->sc_wdcdev.sc_atac.atac_dev = self; 169 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 170 wdr->cmd_iot = wdr->ctl_iot = 171 mb_alloc_bus_space_tag(); 172 wdr->cmd_iot->stride = 0; 173 wdr->cmd_iot->wo_1 = 1; 174 wdr->cmd_iot->abs_rms_2 = read_multi_2_swap; 175 wdr->cmd_iot->abs_wms_2 = write_multi_2_swap; 176 if (bus_space_map(wdr->cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0, 177 &wdr->cmd_baseioh)) { 178 aprint_error_dev(self, "couldn't map registers\n"); 179 return; 180 } 181 for (i = 0; i < WDC_NREG; i++) { 182 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 183 i * 4, 4, &wdr->cmd_iohs[i]) != 0) { 184 aprint_error_dev(self, 185 "couldn't subregion cmd reg %i\n", i); 186 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 187 FALCON_WD_LEN); 188 return; 189 } 190 } 191 192 if (bus_space_subregion(wdr->cmd_iot, 193 wdr->cmd_baseioh, FALCON_WD_AUX, 4, &wdr->ctl_ioh)) { 194 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, FALCON_WD_LEN); 195 aprint_error_dev(self, "couldn't subregion aux reg\n"); 196 return; 197 } 198 199 /* 200 * Play a nasty trick here. Normally we only manipulate the 201 * interrupt *mask*. However to defeat wd_get_parms(), we 202 * disable the interrupts here using the *enable* register. 203 */ 204 MFP->mf_ierb &= ~IB_DINT; 205 206 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | 207 ATAC_CAP_ATA_NOSTREAM; 208 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 209 sc->sc_wdcdev.sc_atac.atac_claim_hw = &claim_hw; 210 sc->sc_wdcdev.sc_atac.atac_free_hw = &free_hw; 211 sc->sc_chanlist[0] = &sc->sc_channel; 212 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist; 213 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 214 sc->sc_channel.ch_channel = 0; 215 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac; 216 sc->sc_channel.ch_queue = &sc->sc_chqueue; 217 sc->sc_channel.ch_ndrive = 2; 218 wdc_init_shadow_regs(&sc->sc_channel); 219 220 /* 221 * Setup & enable disk related interrupts. 222 */ 223 MFP->mf_ierb |= IB_DINT; 224 MFP->mf_iprb = (u_int8_t)~IB_DINT; 225 MFP->mf_imrb |= IB_DINT; 226 227 wdcattach(&sc->sc_channel); 228} 229 230/* 231 * Hardware locking 232 */ 233static int wd_lock; 234 235static int 236claim_hw(chp, maysleep) 237struct ata_channel *chp; 238int maysleep; 239{ 240 if (wd_lock != DMA_LOCK_GRANT) { 241 if (wd_lock == DMA_LOCK_REQ) { 242 /* 243 * ST_DMA access is being claimed. 244 */ 245 return 0; 246 } 247 if (!st_dmagrab((dma_farg)wdcintr, 248 (dma_farg)(maysleep ? NULL : wdcrestart), chp, 249 &wd_lock, 1)) 250 return 0; 251 } 252 return 1; 253} 254 255static void 256free_hw(chp) 257struct ata_channel *chp; 258{ 259 /* 260 * Flush pending interrupts before giving-up lock 261 */ 262 MFP->mf_iprb = (u_int8_t)~IB_DINT; 263 264 /* 265 * Only free the lock on a Falcon. On the Hades, keep it. 266 */ 267/* if (machineid & ATARI_FALCON) */ 268 st_dmafree(chp, &wd_lock); 269} 270 271/* 272 * XXX 273 * This piece of uglyness is caused by the fact that the byte lanes of 274 * the data-register are swapped on the atari. This works OK for an IDE 275 * disk, but turns into a nightmare when used on atapi devices. 276 */ 277#define calc_addr(base, off, stride, wm) \ 278 ((u_long)(base) + ((off) << (stride)) + (wm)) 279 280static void 281read_multi_2_swap(t, h, o, a, c) 282 bus_space_tag_t t; 283 bus_space_handle_t h; 284 bus_size_t o, c; 285 u_int16_t *a; 286{ 287 u_int16_t *ba; 288 289 ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2); 290 for (; c; a++, c--) 291 *a = bswap16(*ba); 292} 293 294static void 295write_multi_2_swap(t, h, o, a, c) 296 bus_space_tag_t t; 297 bus_space_handle_t h; 298 bus_size_t o, c; 299 const u_int16_t *a; 300{ 301 u_int16_t *ba; 302 303 ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2); 304 for (; c; a++, c--) 305 *ba = bswap16(*a); 306} 307