wdc_mb.c revision 1.25 
1/*	$NetBSD: wdc_mb.c,v 1.25 2005/05/10 20:28:35 jdc Exp $	*/
2
3/*-
4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *        This product includes software developed by the NetBSD
21 *        Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 *    contributors may be used to endorse or promote products derived
24 *    from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#include <sys/cdefs.h>
40__KERNEL_RCSID(0, "$NetBSD: wdc_mb.c,v 1.25 2005/05/10 20:28:35 jdc Exp $");
41
42#include <sys/types.h>
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/malloc.h>
46#include <sys/device.h>
47
48#include <machine/bswap.h>
49#include <machine/cpu.h>
50#include <machine/bus.h>
51#include <machine/iomap.h>
52#include <machine/mfp.h>
53#include <machine/dma.h>
54
55#include <dev/ata/atavar.h>
56#include <dev/ic/wdcvar.h>
57
58#include <m68k/asm_single.h>
59
60#include <atari/dev/ym2149reg.h>
61#include <atari/atari/device.h>
62
63/* Falcon IDE register locations (base and offsets). */
64#define FALCON_WD_BASE	0xfff00000
65#define FALCON_WD_LEN	0x40
66
67static int falcon_wd_reg[WDC_NREG + WDC_NSHADOWREG] = {
68    0x00,	/* wd_data	*/
69    0x05,	/* wd_error	*/
70    0x09,	/* wd_seccnt	*/
71    0x0d,	/* wd_sector	*/
72    0x11,	/* wd_cyl_lo	*/
73    0x15,	/* wd_cyl_hi	*/
74    0x19,	/* wd_sdh	*/
75    0x1d,	/* wd_command	*/
76    0x39,	/* wd_status	*/
77    0x01	/* wd_features  */
78    };
79
80/*
81 * XXX This code currently doesn't even try to allow 32-bit data port use.
82 */
83static int	claim_hw __P((struct ata_channel *, int));
84static void	free_hw __P((struct ata_channel *));
85static void	read_multi_2_swap __P((bus_space_tag_t, bus_space_handle_t,
86				bus_size_t, u_int16_t *, bus_size_t));
87static void	write_multi_2_swap __P((bus_space_tag_t, bus_space_handle_t,
88				bus_size_t, const u_int16_t *, bus_size_t));
89
90struct wdc_mb_softc {
91	struct wdc_softc sc_wdcdev;
92	struct	ata_channel *sc_chanlist[1];
93	struct  ata_channel sc_channel;
94	struct	ata_queue sc_chqueue;
95	struct	wdc_regs sc_wdc_regs;
96	void	*sc_ih;
97};
98
99int	wdc_mb_probe	__P((struct device *, struct cfdata *, void *));
100void	wdc_mb_attach	__P((struct device *, struct device *, void *));
101
102CFATTACH_DECL(wdc_mb, sizeof(struct wdc_mb_softc),
103    wdc_mb_probe, wdc_mb_attach, NULL, NULL);
104
105int
106wdc_mb_probe(parent, cfp, aux)
107	struct device *parent;
108	struct cfdata *cfp;
109	void *aux;
110{
111	static int	wdc_matched = 0;
112	struct ata_channel ch;
113	struct wdc_softc wdc;
114	struct wdc_regs wdr;
115	int	result = 0, i;
116	u_char	sv_ierb;
117
118	if ((machineid & ATARI_TT) || strcmp("wdc", aux) || wdc_matched)
119		return 0;
120	if (!atari_realconfig)
121		return 0;
122
123	memset(&wdc, 0, sizeof(wdc));
124	memset(&ch, 0, sizeof(ch));
125	ch.ch_atac = &wdc.sc_atac;
126	wdc.regs = &wdr;
127
128	wdr.cmd_iot = wdr.ctl_iot = mb_alloc_bus_space_tag();
129	if (wdr.cmd_iot == NULL)
130		return 0;
131	wdr.cmd_iot->stride = 2;
132	wdr.cmd_iot->wo_1   = 1;
133
134	if (bus_space_map(wdr.cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
135	    &wdr.cmd_baseioh))
136		return 0;
137	for (i = 0; i < (WDC_NREG + WDC_NSHADOWREG); i++)
138		if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh,
139		    falcon_wd_reg[i], i == 0 ? 2 : 1, &wdr.cmd_iohs[i]) != 0) {
140			bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh,
141			    FALCON_WD_LEN);
142			return 0;
143		}
144
145	/*
146	 * Make sure IDE interrupts are disabled during probing.
147	 */
148	sv_ierb = MFP->mf_ierb;
149	MFP->mf_ierb &= ~IB_DINT;
150
151	/*
152	 * Make sure that IDE is turned on on the Falcon.
153	 */
154	if (machineid & ATARI_FALCON)
155		ym2149_ser2(0);
156
157	result = wdcprobe(&ch);
158
159	MFP->mf_ierb = sv_ierb;
160
161	bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_LEN);
162	mb_free_bus_space_tag(wdr.cmd_iot);
163
164	if (result)
165		wdc_matched = 1;
166	return (result);
167}
168
169void
170wdc_mb_attach(parent, self, aux)
171	struct device *parent, *self;
172	void *aux;
173{
174	struct wdc_mb_softc *sc = (void *)self;
175	struct wdc_regs *wdr;
176	int i;
177
178	printf("\n");
179
180	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
181	wdr->cmd_iot = wdr->ctl_iot =
182	    mb_alloc_bus_space_tag();
183	wdr->cmd_iot->stride = 2;
184	wdr->cmd_iot->wo_1   = 1;
185	wdr->cmd_iot->abs_rms_2 = read_multi_2_swap;
186	wdr->cmd_iot->abs_wms_2 = write_multi_2_swap;
187	if (bus_space_map(wdr->cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
188			  &wdr->cmd_baseioh)) {
189		printf("%s: couldn't map registers\n",
190		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
191		return;
192	}
193	for (i = 0; i < (WDC_NREG + WDC_NSHADOWREG); i++)
194		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
195		    falcon_wd_reg[i], i == 0 ? 2 : 1, &wdr->cmd_iohs[i]) != 0) {
196			printf("%s: couldn't subregion cmd reg %i\n",
197			    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, i);
198			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
199			    FALCON_WD_LEN);
200			return;
201		}
202
203	/*
204	 * Play a nasty trick here. Normally we only manipulate the
205	 * interrupt *mask*. However to defeat wd_get_parms(), we
206	 * disable the interrupts here using the *enable* register.
207	 */
208	MFP->mf_ierb &= ~IB_DINT;
209
210	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 |
211	    ATAC_CAP_ATA_NOSTREAM;
212	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
213	sc->sc_wdcdev.sc_atac.atac_claim_hw = &claim_hw;
214	sc->sc_wdcdev.sc_atac.atac_free_hw  = &free_hw;
215	sc->sc_chanlist[0] = &sc->sc_channel;
216	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
217	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
218	sc->sc_channel.ch_channel = 0;
219	sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
220	sc->sc_channel.ch_queue = &sc->sc_chqueue;
221
222	/*
223	 * Setup & enable disk related interrupts.
224	 */
225	MFP->mf_ierb |= IB_DINT;
226	MFP->mf_iprb  = (u_int8_t)~IB_DINT;
227	MFP->mf_imrb |= IB_DINT;
228
229	wdcattach(&sc->sc_channel);
230}
231
232/*
233 * Hardware locking
234 */
235static int	wd_lock;
236
237static int
238claim_hw(chp, maysleep)
239struct ata_channel *chp;
240int  maysleep;
241{
242	if (wd_lock != DMA_LOCK_GRANT) {
243		if (wd_lock == DMA_LOCK_REQ) {
244			/*
245			 * ST_DMA access is being claimed.
246			 */
247			return 0;
248		}
249		if (!st_dmagrab((dma_farg)wdcintr,
250		    (dma_farg)(maysleep ? NULL : wdcrestart), chp,
251		    &wd_lock, 1))
252			return 0;
253	}
254	return 1;
255}
256
257static void
258free_hw(chp)
259struct ata_channel *chp;
260{
261	/*
262	 * Flush pending interrupts before giving-up lock
263	 */
264	MFP->mf_iprb = (u_int8_t)~IB_DINT;
265
266	/*
267	 * Only free the lock on a Falcon. On the Hades, keep it.
268	 */
269/*	if (machineid & ATARI_FALCON) */
270		st_dmafree(chp, &wd_lock);
271}
272
273/*
274 * XXX
275 * This piece of uglyness is caused by the fact that the byte lanes of
276 * the data-register are swapped on the atari. This works OK for an IDE
277 * disk, but turns into a nightmare when used on atapi devices.
278 */
279#define calc_addr(base, off, stride, wm)	\
280	((u_long)(base) + ((off) << (stride)) + (wm))
281
282static void
283read_multi_2_swap(t, h, o, a, c)
284	bus_space_tag_t		t;
285	bus_space_handle_t	h;
286	bus_size_t		o, c;
287	u_int16_t		*a;
288{
289	u_int16_t	*ba;
290
291	ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2);
292	for (; c; a++, c--)
293		*a = bswap16(*ba);
294}
295
296static void
297write_multi_2_swap(t, h, o, a, c)
298	bus_space_tag_t		t;
299	bus_space_handle_t	h;
300	bus_size_t		o, c;
301	const u_int16_t		*a;
302{
303	u_int16_t	*ba;
304
305	ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2);
306	for (; c; a++, c--)
307		*ba = bswap16(*a);
308}
309