1/* $NetBSD: i80321_intr.h,v 1.13 2021/08/06 08:58:42 rin Exp $ */ 2 3/* 4 * Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe and Steve C. Woodford for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#ifndef _I80321_INTR_H_ 39#ifndef _NO_INTR_H_ 40#define _I80321_INTR_H_ 41 42#define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch) 43 44#ifndef _LOCORE 45 46#include <arm/armreg.h> 47#include <arm/cpufunc.h> 48#include <arm/cpu.h> 49 50#include <arm/xscale/i80321reg.h> 51 52static inline void __attribute__((__unused__)) 53i80321_set_intrmask(void) 54{ 55 extern volatile uint32_t intr_enabled; 56 57 __asm volatile("mcr p6, 0, %0, c0, c0, 0" 58 : 59 : "r" (intr_enabled & ICU_INT_HWMASK)); 60} 61 62#define INT_HPIMASK (1u << ICU_INT_HPI) 63extern volatile uint32_t intr_enabled; 64extern volatile int i80321_ipending; 65extern int i80321_imask[]; 66 67static inline void __attribute__((__unused__)) 68i80321_splx(int new) 69{ 70 int oldirqstate, hwpend; 71 72 /* Don't let the compiler re-order this code with preceding code */ 73 __insn_barrier(); 74 75 set_curcpl(new); 76 77 hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~i80321_imask[new]; 78 if (hwpend != 0) { 79 oldirqstate = disable_interrupts(I32_bit); 80 intr_enabled |= hwpend; 81 i80321_set_intrmask(); 82#ifdef I80321_HPI_ENABLED 83 if (__predict_false(hwpend & INT_HPIMASK)) 84 oldirqstate &= ~I32_bit; 85#endif 86 restore_interrupts(oldirqstate); 87 } 88 89#ifdef __HAVE_FAST_SOFTINTS 90 cpu_dosoftints(); 91#endif 92} 93 94static inline int __attribute__((__unused__)) 95i80321_splraise(int ipl) 96{ 97 int old = curcpl(); 98 99 if (ipl > old) { 100 set_curcpl(ipl); 101 /* 102 * Don't let the compiler re-order this code with 103 * subsequent code 104 */ 105 __insn_barrier(); 106 } 107 108 return (old); 109} 110 111static inline int __attribute__((__unused__)) 112i80321_spllower(int ipl) 113{ 114 int old = curcpl(); 115 i80321_splx(ipl); 116 return(old); 117} 118 119 120#if !defined(EVBARM_SPL_NOINLINE) 121 122#define splx(new) i80321_splx(new) 123#define _spllower(ipl) i80321_spllower(ipl) 124#define _splraise(ipl) i80321_splraise(ipl) 125 126#else 127 128int _splraise(int); 129int _spllower(int); 130void splx(int); 131 132#endif /* ! EVBARM_SPL_NOINLINE */ 133 134#endif /* _LOCORE */ 135 136#endif /* _NO_INTR_H_ */ 137#endif /* _I80321_INTR_H_ */ 138