files.pxa2x0 revision 1.7 
1#	$NetBSD: files.pxa2x0,v 1.7 2005/04/13 07:42:28 scw Exp $
2#
3# Configuration info for Intel PXA2[51]0 CPU support
4#
5
6file	arch/arm/arm/softintr.c  # Use the generic ARM soft interrupt code.
7
8# PXA2[51]0's integrated peripherals bus.
9device pxaip { [addr=-1], [size=0], [intr=-1], [index=-1]} : bus_space_generic
10attach pxaip at mainbus
11file	arch/arm/xscale/pxa2x0.c
12file	arch/arm/arm32/irq_dispatch.S
13file	arch/arm/xscale/pxa2x0_space.c
14#file	arch/arm/xscale/pxa2x0_freqchg.S
15file	arch/arm/xscale/pxa2x0_dma.c
16#file	arch/arm/xscale/pxa2x0_i2c.c
17
18# Cotulla integrated peripherals.
19
20# INTC controller
21device	pxaintc
22attach	pxaintc at pxaip
23file arch/arm/xscale/pxa2x0_intr.c		pxaintc needs-flag
24defflag  opt_pxa2x0_gpio.h		PXAGPIO_HAS_GPION_INTRS
25
26# GPIO controller
27device	pxagpio
28attach	pxagpio at pxaip
29file arch/arm/xscale/pxa2x0_gpio.c		pxagpio needs-flag
30
31# NS16550 compatible serial ports
32attach com at pxaip with pxauart
33file arch/arm/xscale/pxa2x0_com.c		pxauart
34file arch/arm/xscale/pxa2x0_a4x_space.c		pxauart | obio
35file arch/arm/xscale/pxa2x0_a4x_io.S		pxauart | obio
36defflag	opt_com.h	FFUARTCONSOLE STUARTCONSOLE BTUARTCONSOLE
37
38# clock device
39# PXA2x0's built-in timer is compatible to SA-1110.
40device	saost
41attach	saost at pxaip
42file	arch/arm/sa11x0/sa11x0_ost.c		saost needs-flag
43
44# LCD controller
45device lcd: wsemuldisplaydev, rasops16, rasops8, rasops4
46file arch/arm/xscale/pxa2x0_lcd.c		lcd needs-flag
47
48# XXX this is a hack to use dev/pcmcia without fdc.c
49device	fdc
50
51# DMA controller
52device	pxadmac: dmover_service
53attach	pxadmac at pxaip
54file	arch/arm/xscale/pxa2x0_dmac.c		pxadmac needs-flag
55defparam	opt_pxa2x0_dmac.h	PXA2X0_DMAC_FIXED_PRIORITY
56defparam	opt_pxa2x0_dmac.h	PXA2X0_DMAC_DMOVER_CONCURRENCY
57
58# AC97 Controller
59device	pxaacu: audiobus, auconv, mulaw, ac97, aurateconv
60attach	pxaacu at pxaip
61file	arch/arm/xscale/pxa2x0_ac97.c		pxaacu
62