1/* $NetBSD: ti_sdhcreg.h,v 1.2 2019/10/27 17:21:23 jmcneill Exp $ */ 2/*- 3 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas of 3am Software Foundry. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#ifndef _TI_SDMMCREG_H_ 32#define _TI_SDMMCREG_H_ 33 34#define MMCHS_HL_REV 0x000 35#define MMCHS_HL_HWINFO 0x004 36# define HL_HWINFO_RETMODE (1 << 8) 37# define HL_HWINFO_MEM_SIZE_MASK (0xf << 2) 38# define HL_HWINFO_MEM_SIZE_512 (0x1 << 2) 39# define HL_HWINFO_MEM_SIZE_1024 (0x2 << 2) 40# define HL_HWINFO_MEM_SIZE_2048 (0x4 << 2) 41# define HL_HWINFO_MEM_SIZE_4096 (0x8 << 2) 42# define HL_HWINFO_MEMRGE_MEM (1 << 1) 43# define HL_HWINFO_MADMA_EN (1 << 0) 44#define MMCHS_HL_SYSCONFIG 0x010 45# define HL_SYSCONFIG_STANDBYMODE_MASK (0x3 << 2) 46# define HL_SYSCONFIG_STANDBYMODE_FORCE (0 << 2) 47# define HL_SYSCONFIG_STANDBYMODE_NO (1 << 2) 48# define HL_SYSCONFIG_STANDBYMODE_SMART (2 << 2) 49# define HL_SYSCONFIG_STANDBYMODE_WC (3 << 2) /* Smart-Idle wakeup-capable */ 50# define HL_SYSCONFIG_IDLEMODE_MASK (0x3 << 2) 51# define HL_SYSCONFIG_IDLEMODE_FORCE (0 << 2) 52# define HL_SYSCONFIG_IDLEMODE_NO (1 << 2) 53# define HL_SYSCONFIG_IDLEMODE_SMART (2 << 2) 54# define HL_SYSCONFIG_IDLEMODE_WC (3 << 2) /* Smart-Idle wakeup-capable */ 55# define HL_SYSCONFIG_FREEEMU (1 << 1) 56# define HL_SYSCONFIG_SOFTRESET (1 << 0) 57 58#define MMCHS_SYSCONFIG 0x010 /* System Configuration */ 59# define SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8) 60# define SYSCONFIG_CLOCKACTIVITY_FCLK (2 << 8) 61# define SYSCONFIG_CLOCKACTIVITY_ICLK (1 << 8) 62# define SYSCONFIG_SIDLEMODE_MASK (3 << 3) 63# define SYSCONFIG_SIDLEMODE_AUTO (2 << 3) 64# define SYSCONFIG_SIDLEMODE_IGNORE (1 << 3) 65# define SYSCONFIG_ENAWAKEUP (1 << 2) 66# define SYSCONFIG_SOFTRESET (1 << 1) 67# define SYSCONFIG_AUTOIDLE (1 << 0) 68#define MMCHS_SYSSTATUS 0x014 /* System Status */ 69# define SYSSTATUS_RESETDONE (1 << 0) 70#define MMCHS_CSRE 0x024 /* Card status response error */ 71#define MMCHS_SYSTEST 0x028 /* System Test */ 72#define MMCHS_CON 0x02c /* Configuration */ 73# define CON_SDMA_LNE (1 << 21) /*Slave DMA Lvl/Edg Rq*/ 74# define CON_MNS (1 << 20) /* DMA Mstr/Slv sel */ 75# define CON_DDR (1 << 19) /* Dual Data Rate */ 76# define CON_CF0 (1 << 18) /*Boot status support*/ 77# define CON_BOOTACK (1 << 17) /*Boot acknowledge rcv*/ 78# define CON_CLKEXTFREE (1 << 16) 79# define CON_PADEN (1 << 15) /* Ctrl Pow for MMC */ 80# define CON_OBIE (1 << 14) /* Out-of-Band Intr */ 81# define CON_OBIP (1 << 13) /*O-of-B Intr Polarity*/ 82# define CON_CEATA (1 << 12) /* CE-ATA */ 83# define CON_CTPL (1 << 11) /* Ctrl Power dat[1] */ 84# define CON_DVAL_33US (0 << 9) /* debounce filter val*/ 85# define CON_DVAL_231US (1 << 9) /* debounce filter val*/ 86# define CON_DVAL_1MS (2 << 9) /* debounce filter val*/ 87# define CON_DVAL_8_4MS (3 << 9) /* 8.4ms */ 88# define CON_WPP (1 << 8) /* Write protect pol */ 89# define CON_CDP (1 << 7) /*Card detect polarity*/ 90# define CON_MIT (1 << 6) /* MMC interrupt cmd */ 91# define CON_DW8 (1 << 5) /* 8-bit mode */ 92# define CON_MODE (1 << 4) /* SYSTEST mode */ 93# define CON_STR (1 << 3) /* Stream command */ 94# define CON_HR (1 << 2) /* Broadcast host rsp */ 95# define CON_INIT (1 << 1) /* Send init stream */ 96# define CON_OD (1 << 0) /* Card open drain */ 97#define MMCHS_PWCNT 0x030 /* Power counter */ 98 99#endif 100