exynos_ehci.c revision 1.7 
1/* $NetBSD: exynos_ehci.c,v 1.7 2021/04/24 23:36:28 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.7 2021/04/24 23:36:28 thorpej Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/device.h>
35#include <sys/intr.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38
39#include <dev/usb/usb.h>
40#include <dev/usb/usbdi.h>
41#include <dev/usb/usbdivar.h>
42#include <dev/usb/usb_mem.h>
43#include <dev/usb/ehcireg.h>
44#include <dev/usb/ehcivar.h>
45
46#include <dev/fdt/fdtvar.h>
47
48static int	exynos_ehci_match(device_t, cfdata_t, void *);
49static void	exynos_ehci_attach(device_t, device_t, void *);
50
51CFATTACH_DECL2_NEW(exynos_ehci, sizeof(struct ehci_softc),
52	exynos_ehci_match, exynos_ehci_attach, NULL,
53	ehci_activate, NULL, ehci_childdet);
54
55static const struct device_compatible_entry compat_data[] = {
56	{ .compat = "samsung,exynos4210-ehci" },
57	DEVICE_COMPAT_EOL
58};
59
60static int
61exynos_ehci_match(device_t parent, cfdata_t cf, void *aux)
62{
63	struct fdt_attach_args * const faa = aux;
64
65	return of_compatible_match(faa->faa_phandle, compat_data);
66}
67
68static void
69exynos_ehci_attach(device_t parent, device_t self, void *aux)
70{
71	struct ehci_softc * const sc = device_private(self);
72	struct fdt_attach_args * const faa = aux;
73	const int phandle = faa->faa_phandle;
74	struct fdtbus_phy *phy;
75	struct clk *clk;
76	char intrstr[128];
77	bus_addr_t addr;
78	bus_size_t size;
79	int error, child;
80	void *ih;
81
82	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
83		aprint_error(": couldn't get registers\n");
84		return;
85	}
86
87	/* Enable clocks */
88	clk = fdtbus_clock_get(phandle, "usbhost");
89	if (clk == NULL || clk_enable(clk) != 0) {
90		aprint_error(": couldn't enable clock\n");
91		return;
92	}
93
94	/* Enable phys for each port */
95	for (child = OF_child(phandle); child; child = OF_peer(child)) {
96		phy = fdtbus_phy_get_index(child, 0);
97		if (phy && fdtbus_phy_enable(phy, true) != 0)
98			aprint_error(": couldn't enable phy for %s\n",
99			    fdtbus_get_string(child, "name"));
100	}
101
102	sc->sc_dev = self;
103	sc->sc_bus.ub_hcpriv = sc;
104	sc->sc_bus.ub_dmatag = faa->faa_dmat;
105	sc->sc_bus.ub_revision = USBREV_2_0;
106	if (of_hasprop(phandle, "has-transaction-translator"))
107		sc->sc_flags |= EHCIF_ETTF;
108	else
109		sc->sc_ncomp = 1;
110	sc->sc_size = size;
111	sc->iot = faa->faa_bst;
112	if (bus_space_map(sc->iot, addr, size, 0, &sc->ioh) != 0) {
113		aprint_error(": couldn't map registers\n");
114		return;
115	}
116
117	aprint_naive("\n");
118	aprint_normal(": Exynos EHCI\n");
119
120	/* Disable interrupts */
121	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
122	EOWRITE4(sc, EHCI_USBINTR, 0);
123
124	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
125		aprint_error_dev(self, "failed to decode interrupt\n");
126		return;
127	}
128
129	ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
130	    ehci_intr, sc, device_xname(self));
131	if (ih == NULL) {
132		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
133		    intrstr);
134		return;
135	}
136	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
137
138	error = ehci_init(sc);
139	if (error) {
140		aprint_error_dev(self, "init failed, error = %d\n", error);
141		return;
142	}
143
144	sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint, CFARG_EOL);
145}
146