rk_anxdp.c revision 1.3 
1/* $NetBSD: rk_anxdp.c,v 1.3 2021/01/27 03:10:19 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2019 Jonathan A. Kollasch <jakllsch@kollasch.net>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: rk_anxdp.c,v 1.3 2021/01/27 03:10:19 thorpej Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/device.h>
35#include <sys/intr.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/conf.h>
39
40#include <drm/drmP.h>
41#include <drm/drm_crtc_helper.h>
42
43#include <dev/fdt/fdtvar.h>
44#include <dev/fdt/fdt_port.h>
45#include <dev/fdt/syscon.h>
46
47#include <dev/ic/anx_dp.h>
48
49#define	RK3399_GRF_SOC_CON20		0x6250
50#define  EDP_LCDC_SEL			__BIT(5)
51
52enum {
53	ANXDP_PORT_INPUT = 0,
54	ANXDP_PORT_OUTPUT = 1,
55};
56
57static const struct device_compatible_entry compat_data[] = {
58	{ .compat = "rockchip,rk3399-edp" },
59	DEVICE_COMPAT_EOL
60};
61
62struct rk_anxdp_softc {
63	struct anxdp_softc	sc_base;
64	int			sc_phandle;
65
66	struct fdt_device_ports	sc_ports;
67	struct drm_encoder	sc_encoder;
68	struct drm_display_mode	sc_curmode;
69	struct syscon		*sc_grf;
70
71	bool			sc_activated;
72};
73
74#define	to_rk_anxdp_softc(x)	container_of(x, struct rk_anxdp_softc, sc_base)
75#define	to_rk_anxdp_encoder(x)	container_of(x, struct rk_anxdp_softc, sc_encoder)
76
77static void
78rk_anxdp_select_input(struct rk_anxdp_softc *sc, u_int crtc_index)
79{
80	const uint32_t write_mask = EDP_LCDC_SEL << 16;
81	const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0;
82
83	syscon_lock(sc->sc_grf);
84	syscon_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val);
85	syscon_unlock(sc->sc_grf);
86}
87
88static bool
89rk_anxdp_encoder_mode_fixup(struct drm_encoder *encoder,
90    const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
91{
92	return true;
93}
94
95static void
96rk_anxdp_encoder_mode_set(struct drm_encoder *encoder,
97    struct drm_display_mode *mode, struct drm_display_mode *adjusted)
98{
99}
100
101static void
102rk_anxdp_encoder_enable(struct drm_encoder *encoder)
103{
104}
105
106static void
107rk_anxdp_encoder_disable(struct drm_encoder *encoder)
108{
109}
110
111static void
112rk_anxdp_encoder_prepare(struct drm_encoder *encoder)
113{
114	struct rk_anxdp_softc * const sc = to_rk_anxdp_encoder(encoder);
115	const u_int crtc_index = drm_crtc_index(encoder->crtc);
116
117	rk_anxdp_select_input(sc, crtc_index);
118}
119
120static void
121rk_anxdp_encoder_commit(struct drm_encoder *encoder)
122{
123}
124
125static void
126rk_anxdp_encoder_dpms(struct drm_encoder *encoder, int mode)
127{
128	struct rk_anxdp_softc * const sc = to_rk_anxdp_encoder(encoder);
129
130	anxdp_dpms(&sc->sc_base, mode);
131}
132
133static const struct drm_encoder_funcs rk_anxdp_encoder_funcs = {
134	.destroy = drm_encoder_cleanup,
135};
136
137static const struct drm_encoder_helper_funcs rk_anxdp_encoder_helper_funcs = {
138	.prepare = rk_anxdp_encoder_prepare,
139	.mode_fixup = rk_anxdp_encoder_mode_fixup,
140	.mode_set = rk_anxdp_encoder_mode_set,
141	.enable = rk_anxdp_encoder_enable,
142	.disable = rk_anxdp_encoder_disable,
143	.commit = rk_anxdp_encoder_commit,
144	.dpms = rk_anxdp_encoder_dpms,
145};
146
147static int
148rk_anxdp_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate)
149{
150	struct rk_anxdp_softc * const sc = device_private(dev);
151	struct fdt_endpoint *in_ep = fdt_endpoint_remote(ep);
152	struct fdt_endpoint *out_ep, *out_rep;
153	struct drm_crtc *crtc;
154	int error;
155
156	if (sc->sc_activated != false) {
157		return 0;
158	}
159
160	if (!activate)
161		return EINVAL;
162
163	if (fdt_endpoint_port_index(ep) != ANXDP_PORT_INPUT)
164		return EINVAL;
165
166	switch (fdt_endpoint_type(in_ep)) {
167	case EP_DRM_CRTC:
168		crtc = fdt_endpoint_get_data(in_ep);
169		break;
170	default:
171		return EINVAL;
172		break;
173	}
174
175	sc->sc_encoder.possible_crtcs = 0x3; /* XXX */
176	drm_encoder_init(crtc->dev, &sc->sc_encoder, &rk_anxdp_encoder_funcs,
177	    DRM_MODE_ENCODER_TMDS);
178	drm_encoder_helper_add(&sc->sc_encoder, &rk_anxdp_encoder_helper_funcs);
179
180	out_ep = fdt_endpoint_get_from_index(&sc->sc_ports, ANXDP_PORT_OUTPUT, 0);
181	if (out_ep != NULL) {
182		out_rep = fdt_endpoint_remote(out_ep);
183		if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_PANEL)
184			sc->sc_base.sc_panel = fdt_endpoint_get_data(out_rep);
185	}
186
187        sc->sc_base.sc_connector.base.connector_type = DRM_MODE_CONNECTOR_eDP;
188	error = anxdp_bind(&sc->sc_base, &sc->sc_encoder);
189	if (error != 0)
190		return error;
191	sc->sc_activated = true;
192
193	if (out_ep != NULL) {
194		/* Ignore downstream connectors, we have our own. */
195		if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_CONNECTOR)
196			return 0;
197		error = fdt_endpoint_activate(out_ep, activate);
198		if (error != 0)
199			return error;
200	}
201
202	return 0;
203}
204
205static void *
206rk_anxdp_ep_get_data(device_t dev, struct fdt_endpoint *ep)
207{
208	struct rk_anxdp_softc * const sc = device_private(dev);
209
210	return &sc->sc_encoder;
211}
212
213#if ANXDP_AUDIO
214static audio_dai_tag_t
215rk_anxdp_dai_get_tag(device_t dev, const void *data, size_t len)
216{
217	struct rk_anxdp_softc * const sc = device_private(dev);
218
219	if (len != 4)
220		return NULL;
221
222	return &sc->sc_base.sc_dai;
223}
224
225static struct fdtbus_dai_controller_func rk_anxdp_dai_funcs = {
226	.get_tag = rk_anxdp_dai_get_tag
227};
228#endif
229
230static int
231rk_anxdp_match(device_t parent, cfdata_t cf, void *aux)
232{
233	struct fdt_attach_args * const faa = aux;
234
235	return of_compatible_match(faa->faa_phandle, compat_data);
236}
237
238static void
239rk_anxdp_attach(device_t parent, device_t self, void *aux)
240{
241	struct rk_anxdp_softc * const sc = device_private(self);
242	struct fdt_attach_args * const faa = aux;
243	const int phandle = faa->faa_phandle;
244	bus_addr_t addr;
245	bus_size_t size;
246
247	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
248		aprint_error(": couldn't get registers\n");
249		return;
250	}
251
252	/* Required */
253	if (fdtbus_clock_enable(phandle, "pclk", true) != 0) {
254		aprint_error(": couldn't enable pclk clock\n");
255		return;
256	}
257
258	/* Required */
259	if (fdtbus_clock_enable(phandle, "dp", true) != 0) {
260		aprint_error(": couldn't enable dp clock\n");
261		return;
262	}
263
264	/* Optional */
265	if (fdtbus_clock_enable(phandle, "grf", false) != 0) {
266		aprint_error(": couldn't enable grf clock\n");
267		return;
268	}
269
270	/* TODO: Optional phy */
271
272	sc->sc_base.sc_dev = self;
273	sc->sc_base.sc_bst = faa->faa_bst;
274	if (bus_space_map(sc->sc_base.sc_bst, addr, size, 0, &sc->sc_base.sc_bsh) != 0) {
275		aprint_error(": couldn't map registers\n");
276		return;
277	}
278	sc->sc_phandle = faa->faa_phandle;
279	sc->sc_grf = fdtbus_syscon_acquire(phandle, "rockchip,grf");
280	if (sc->sc_grf == NULL) {
281		aprint_error(": couldn't get grf syscon\n");
282		return;
283	}
284
285	aprint_naive("\n");
286	aprint_normal(": eDP TX\n");
287
288	sc->sc_base.sc_flags |= ANXDP_FLAG_ROCKCHIP;
289
290	if (anxdp_attach(&sc->sc_base) != 0) {
291		aprint_error_dev(self, "failed to attach driver\n");
292		return;
293	}
294
295	sc->sc_ports.dp_ep_activate = rk_anxdp_ep_activate;
296	sc->sc_ports.dp_ep_get_data = rk_anxdp_ep_get_data;
297	fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_ENCODER);
298
299#if ANXDP_AUDIO
300	fdtbus_register_dai_controller(self, phandle, &rk_anxdp_dai_funcs);
301#endif
302}
303
304CFATTACH_DECL_NEW(rk_anxdp, sizeof(struct rk_anxdp_softc),
305	rk_anxdp_match, rk_anxdp_attach, NULL, NULL);
306