1/* $NetBSD: rk3288_iomux.c,v 1.2 2021/11/12 22:53:20 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: rk3288_iomux.c,v 1.2 2021/11/12 22:53:20 jmcneill Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/device.h>
35#include <sys/intr.h>
36#include <sys/systm.h>
37#include <sys/mutex.h>
38#include <sys/kmem.h>
39#include <sys/lwp.h>
40
41#include <dev/fdt/fdtvar.h>
42#include <dev/fdt/syscon.h>
43
44#define	GPIO_P_CTL_Z		0
45#define	GPIO_P_CTL_PULLUP	1
46#define	GPIO_P_CTL_PULLDOWN	2
47#define	GPIO_P_CTL_MASK		0x3U
48
49#define	GPIO_E_CTL_2MA		0
50#define	GPIO_E_CTL_4MA		1
51#define	GPIO_E_CTL_8MA		2
52#define	GPIO_E_CTL_12MA		3
53#define	GPIO_E_CTL_MASK		0x3U
54
55static const struct device_compatible_entry compat_data[] = {
56	{ .compat = "rockchip,rk3288-pinctrl" },
57	DEVICE_COMPAT_EOL
58};
59
60struct rk3288_iomux_softc {
61	device_t sc_dev;
62	struct syscon *sc_grf;
63	struct syscon *sc_pmu;
64};
65
66struct rk3288_iomux_reg {
67	struct syscon	*syscon;
68	int		mux_reg;
69	uint32_t	mux_bit;
70	int		pull_reg;
71	uint32_t	pull_bit;
72	int		drv_reg;
73	uint32_t	drv_bit;
74	uint32_t	flags;
75#define	IOMUX_NOROUTE	__BIT(0)
76#define	IOMUX_4BIT	__BIT(1)
77};
78
79#define	LOCK(reg)		\
80	syscon_lock((reg)->syscon)
81#define	UNLOCK(reg)		\
82	syscon_unlock((reg)->syscon)
83#define	RD4(reg, off)		\
84	syscon_read_4((reg)->syscon, (off))
85#define	WR4(reg, off, val)	\
86	syscon_write_4((reg)->syscon, (off), (val))
87#define	ISPMU(sc, reg)		\
88	((reg)->syscon == (sc)->sc_pmu)
89
90static int	rk3288_iomux_match(device_t, cfdata_t, void *);
91static void	rk3288_iomux_attach(device_t, device_t, void *);
92
93CFATTACH_DECL_NEW(rk3288_iomux, sizeof(struct rk3288_iomux_softc),
94	rk3288_iomux_match, rk3288_iomux_attach, NULL, NULL);
95
96#define	NBANKS		9
97#define	NPINSPERBANK	32
98
99static uint32_t rk3288_iomux_flags[NBANKS][NPINSPERBANK / 8] = {
100	[0] = { 0, 0, 0, IOMUX_NOROUTE },
101	[1] = { IOMUX_NOROUTE, IOMUX_NOROUTE, IOMUX_NOROUTE, 0 },
102	[2] = { 0, 0, 0, IOMUX_NOROUTE },
103	[3] = { 0, 0, 0, IOMUX_4BIT },
104	[4] = { IOMUX_4BIT, IOMUX_4BIT, 0, 0 },
105	[5] = { IOMUX_NOROUTE, 0, 0, IOMUX_NOROUTE },
106	[6] = { 0, 0, 0, IOMUX_NOROUTE },
107	[7] = { 0, 0, IOMUX_4BIT, IOMUX_NOROUTE },
108	[8] = { 0, 0, IOMUX_NOROUTE, IOMUX_NOROUTE }
109};
110
111static int rk3288_iomux_offset[NBANKS][NPINSPERBANK / 8] = {
112	/* PMU offsets */
113	[0] = { 0x84, 0x88, 0x8c, -1 },
114	/* GRF offsets */
115	[1] = { -1, -1, -1, 0x0c },
116	[2] = { 0x10, 0x14, 0x18, -1 },
117	[3] = { 0x20, 0x24, 0x28, 0x2c },
118	[4] = { 0x34, 0x3c, 0x44, 0x48 },
119	[5] = { -1, 0x50, 0x54, -1 },
120	[6] = { 0x5c, 0x60, 0x64, -1 },
121	[7] = { 0x6c, 0x70, 0x74, -1 },
122	[8] = { 0x80, 0x84, -1, -1 },
123};
124
125static bool
126rk3288_iomux_get_reg(struct rk3288_iomux_softc *sc, u_int bank, u_int idx,
127    struct rk3288_iomux_reg *reg)
128{
129	if (bank >= NBANKS || idx >= NPINSPERBANK) {
130		return false;
131	}
132
133	if (bank == 0) {
134		reg->syscon = sc->sc_pmu;
135		reg->pull_reg = 0x64 + (idx / 8) * 4;
136		reg->pull_bit = idx % 8 * 2;
137		reg->drv_reg = 0x70 + (idx / 8) * 4;
138		reg->drv_bit = idx % 8 * 2;
139	} else {
140		reg->syscon = sc->sc_grf;
141		reg->pull_reg = 0x130 + (bank * 0x10) + (idx / 8) * 4;
142		reg->pull_bit = idx % 8 * 2;
143		reg->drv_reg = 0x1b0 + (bank * 0x10) + (idx / 8) * 4;
144		reg->drv_bit = idx % 8 * 2;
145	}
146	reg->flags = rk3288_iomux_flags[bank][idx / 8];
147	reg->mux_reg = rk3288_iomux_offset[bank][idx / 8];
148	if (reg->mux_reg != -1) {
149		if ((reg->flags & IOMUX_4BIT) == 0) {
150			reg->mux_bit = idx % 8 * 2;
151		} else {
152			reg->mux_bit = idx % 4 * 4;
153			if ((idx % 8) >= 4) {
154				reg->mux_reg += 0x4;
155			}
156		}
157	}
158
159	return true;
160}
161
162static void
163rk3288_iomux_set_bias(struct rk3288_iomux_softc *sc, struct rk3288_iomux_reg *reg,
164    int bias)
165{
166	uint32_t val;
167	u_int p;
168
169	switch (bias) {
170	case 0:
171		p = GPIO_P_CTL_Z;
172		break;
173	case GPIO_PIN_PULLUP:
174		p = GPIO_P_CTL_PULLUP;
175		break;
176	case GPIO_PIN_PULLDOWN:
177		p = GPIO_P_CTL_PULLDOWN;
178		break;
179	default:
180		return;
181	}
182
183	if (ISPMU(sc, reg)) {
184		val = RD4(reg, reg->pull_reg);
185		val &= ~(GPIO_P_CTL_MASK << reg->pull_bit);
186	} else {
187		val = GPIO_P_CTL_MASK << (reg->pull_bit + 16);
188	}
189	val |= p << reg->pull_bit;
190	WR4(reg, reg->pull_reg, val);
191}
192
193static void
194rk3288_iomux_set_drive_strength(struct rk3288_iomux_softc *sc,
195    struct rk3288_iomux_reg *reg, int drv)
196{
197	uint32_t val;
198	u_int e;
199
200	switch (drv) {
201	case 2:
202		e = GPIO_E_CTL_2MA;
203		break;
204	case 4:
205		e = GPIO_E_CTL_4MA;
206		break;
207	case 8:
208		e = GPIO_E_CTL_8MA;
209		break;
210	case 12:
211		e = GPIO_E_CTL_12MA;
212		break;
213	default:
214		return;
215	}
216
217	if (ISPMU(sc, reg)) {
218		val = RD4(reg, reg->drv_reg);
219		val &= ~(GPIO_E_CTL_MASK << reg->drv_bit);
220	} else {
221		val = GPIO_E_CTL_MASK << (reg->drv_bit + 16);
222	}
223	val = e << reg->drv_bit;
224	WR4(reg, reg->drv_reg, val);
225}
226
227static void
228rk3288_iomux_set_mux(struct rk3288_iomux_softc *sc,
229    struct rk3288_iomux_reg *reg, u_int mux)
230{
231	uint32_t val;
232
233	KASSERT(reg->mux_reg != -1);
234
235	const uint32_t mask = (reg->flags & IOMUX_4BIT) ? 0xf : 0x3;
236	if (ISPMU(sc, reg)) {
237		val = RD4(reg, reg->mux_reg);
238		val &= ~(mask << reg->mux_bit);
239	} else {
240		val = mask << (reg->mux_bit + 16);
241	}
242	val |= mux << reg->mux_bit;
243	WR4(reg, reg->mux_reg, val);
244}
245
246static void
247rk3288_iomux_config(struct rk3288_iomux_softc *sc, struct rk3288_iomux_reg *reg,
248    u_int mux, const int phandle)
249{
250	int bias, drv;
251
252	bias = fdtbus_pinctrl_parse_bias(phandle, NULL);
253	drv = fdtbus_pinctrl_parse_drive_strength(phandle);
254
255#ifdef RK3288_IOMUX_DEBUG
256	printf("  -> %s mux %#x/%d, pull %#x/%d, drv %#x/%d, flags %#x\n",
257	    reg->syscon == sc->sc_pmu ? "pmu" : "grf",
258	    reg->mux_reg, reg->mux_bit,
259	    reg->pull_reg, reg->pull_bit,
260	    reg->drv_reg, reg->drv_bit,
261	    reg->flags);
262	printf("     bias %d drv %d mux %u\n", bias, drv, mux);
263#endif
264
265	LOCK(reg);
266
267	if (bias != -1) {
268		rk3288_iomux_set_bias(sc, reg, bias);
269	}
270	if (drv != -1) {
271		rk3288_iomux_set_drive_strength(sc, reg, drv);
272	}
273	if ((reg->flags & IOMUX_NOROUTE) == 0) {
274		rk3288_iomux_set_mux(sc, reg, mux);
275	}
276
277	UNLOCK(reg);
278}
279
280static int
281rk3288_iomux_pinctrl_set_config(device_t dev, const void *data, size_t len)
282{
283	struct rk3288_iomux_softc * const sc = device_private(dev);
284	int pins_len = 0;
285
286	if (len != 4) {
287		return -1;
288	}
289
290	const int phandle = fdtbus_get_phandle_from_native(be32dec(data));
291	const u_int *pins = fdtbus_get_prop(phandle, "rockchip,pins", &pins_len);
292
293	while (pins_len >= 16) {
294		const u_int bank = be32toh(pins[0]);
295		const u_int idx = be32toh(pins[1]);
296		const u_int mux = be32toh(pins[2]);
297		const int cfg = fdtbus_get_phandle_from_native(be32toh(pins[3]));
298		struct rk3288_iomux_reg regdef = {};
299
300		if (rk3288_iomux_get_reg(sc, bank, idx, &regdef)) {
301#ifdef RK3288_IOMUX_DEBUG
302			printf(" -> gpio%u P%c%u (%u)\n", bank, 'A' + (idx / 8), idx % 8, idx);
303#endif
304			rk3288_iomux_config(sc, &regdef, mux, cfg);
305		} else {
306			aprint_error_dev(dev, "unsupported iomux bank %u idx %u\n",
307			    bank, mux);
308		}
309
310		pins_len -= 16;
311		pins += 4;
312	}
313
314	return 0;
315}
316
317static struct fdtbus_pinctrl_controller_func rk3288_iomux_pinctrl_funcs = {
318	.set_config = rk3288_iomux_pinctrl_set_config,
319};
320
321static int
322rk3288_iomux_match(device_t parent, cfdata_t cf, void *aux)
323{
324	struct fdt_attach_args * const faa = aux;
325
326	return of_compatible_match(faa->faa_phandle, compat_data);
327}
328
329static void
330rk3288_iomux_attach(device_t parent, device_t self, void *aux)
331{
332	struct rk3288_iomux_softc * const sc = device_private(self);
333	struct fdt_attach_args * const faa = aux;
334	const int phandle = faa->faa_phandle;
335
336	sc->sc_dev = self;
337	sc->sc_grf = fdtbus_syscon_acquire(phandle, "rockchip,grf");
338	if (sc->sc_grf == NULL) {
339		aprint_error(": couldn't acquire grf syscon\n");
340		return;
341	}
342	sc->sc_pmu = fdtbus_syscon_acquire(phandle, "rockchip,pmu");
343	if (sc->sc_pmu == NULL) {
344		aprint_error(": couldn't acquire pmu syscon\n");
345		return;
346	}
347
348	aprint_naive("\n");
349	aprint_normal(": RK3288 IOMUX control\n");
350
351	for (int child = OF_child(phandle); child; child = OF_peer(child)) {
352		for (int sub = OF_child(child); sub; sub = OF_peer(sub)) {
353			if (!of_hasprop(sub, "rockchip,pins"))
354				continue;
355			fdtbus_register_pinctrl_config(self, sub, &rk3288_iomux_pinctrl_funcs);
356		}
357	}
358
359	for (int child = OF_child(phandle); child; child = OF_peer(child)) {
360		struct fdt_attach_args cfaa = *faa;
361		cfaa.faa_phandle = child;
362		cfaa.faa_name = fdtbus_get_string(child, "name");
363		cfaa.faa_quiet = false;
364
365		config_found(self, &cfaa, NULL, CFARGS_NONE);
366	}
367}
368