ofw_irqhandler.c revision 1.9
1/*	$NetBSD: ofw_irqhandler.c,v 1.9 2007/02/19 21:46:32 matt Exp $	*/
2
3/*
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by Mark Brinicombe
21 *	for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 *    endorse or promote products derived from this software without specific
24 *    prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 *	from: irqhandler.c
38 *
39 * IRQ/FIQ initialisation, claim, release and handler routines
40 *
41 * Created      : 30/09/94
42 */
43
44#include <sys/cdefs.h>
45__KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.9 2007/02/19 21:46:32 matt Exp $");
46
47#include "opt_irqstats.h"
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/syslog.h>
52#include <sys/malloc.h>
53
54#include <uvm/uvm_extern.h>
55
56#include <machine/intr.h>
57#include <machine/cpu.h>
58
59irqhandler_t *irqhandlers[NIRQS];
60
61int current_intr_depth;
62u_int current_mask;
63u_int actual_mask;
64u_int disabled_mask;
65u_int spl_mask;
66u_int irqmasks[IPL_LEVELS];
67extern u_int intrcnt[];
68
69extern char *_intrnames;
70
71/* Prototypes */
72
73int podule_irqhandler		__P((void));
74extern void set_spl_masks	__P((void));
75
76/*
77 * void irq_init(void)
78 *
79 * Initialise the IRQ/FIQ sub system
80 */
81
82void
83irq_init()
84{
85	int loop;
86
87	/* Clear all the IRQ handlers and the irq block masks */
88	for (loop = 0; loop < NIRQS; ++loop) {
89		irqhandlers[loop] = NULL;
90	}
91
92	/*
93	 * Setup the irqmasks for the different Interrupt Priority Levels
94	 * We will start with no bits set and these will be updated as handlers
95	 * are installed at different IPL's.
96	 */
97	for (loop = 0; loop < IPL_LEVELS; ++loop)
98		irqmasks[loop] = 0;
99
100	current_intr_depth = 0;
101	current_mask = 0x00000000;
102	disabled_mask = 0x00000000;
103	actual_mask = 0x00000000;
104	spl_mask = 0x00000000;
105
106	set_spl_masks();
107
108	/* Enable IRQ's and FIQ's */
109	enable_interrupts(I32_bit | F32_bit);
110}
111
112
113/*
114 * int irq_claim(int irq, irqhandler_t *handler)
115 *
116 * Enable an IRQ and install a handler for it.
117 */
118
119int
120irq_claim(irq, handler)
121	int irq;
122	irqhandler_t *handler;
123{
124	int level;
125	int loop;
126
127#ifdef DIAGNOSTIC
128	/* Sanity check */
129	if (handler == NULL)
130		panic("NULL interrupt handler");
131	if (handler->ih_func == NULL)
132		panic("Interrupt handler does not have a function");
133#endif	/* DIAGNOSTIC */
134
135	/*
136	 * IRQ_INSTRUCT indicates that we should get the irq number
137	 * from the irq structure
138	 */
139	if (irq == IRQ_INSTRUCT)
140		irq = handler->ih_num;
141
142	/* Make sure the irq number is valid */
143	if (irq < 0 || irq >= NIRQS)
144		return(-1);
145
146	/* Make sure the level is valid */
147	if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
148    	        return(-1);
149
150	/* Attach handler at top of chain */
151	handler->ih_next = irqhandlers[irq];
152	irqhandlers[irq] = handler;
153
154	/*
155	 * Reset the flags for this handler.
156	 * As the handler is now in the chain mark it as active.
157	 */
158	handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
159
160	/*
161	 * Record the interrupt number for accounting.
162	 * Done here as the accounting number may not be the same as the
163	 * IRQ number though for the moment they are
164	 */
165	handler->ih_num = irq;
166
167#ifdef IRQSTATS
168	/* Get the interrupt name from the head of the list */
169	if (handler->ih_name) {
170		char *ptr = _intrnames + (irq * 14);
171		strcpy(ptr, "             ");
172		strncpy(ptr, handler->ih_name,
173		    min(strlen(handler->ih_name), 13));
174	} else {
175		char *ptr = _intrnames + (irq * 14);
176		sprintf(ptr, "irq %2d     ", irq);
177	}
178#endif	/* IRQSTATS */
179
180	/*
181	 * Update the irq masks.
182	 * Find the lowest interrupt priority on the irq chain.
183	 * Interrupt is allowable at priorities lower than this.
184	 * If ih_level is out of range then don't bother to update
185	 * the masks.
186	 */
187	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
188		irqhandler_t *ptr;
189
190		/*
191		 * Find the lowest interrupt priority on the irq chain.
192		 * Interrupt is allowable at priorities lower than this.
193		 */
194		ptr = irqhandlers[irq];
195		if (ptr) {
196			level = ptr->ih_level - 1;
197			while (ptr) {
198				if (ptr->ih_level - 1 < level)
199					level = ptr->ih_level - 1;
200				ptr = ptr->ih_next;
201			}
202			while (level >= 0) {
203				irqmasks[level] |= (1 << irq);
204				--level;
205			}
206		}
207
208#include "sl.h"
209#include "ppp.h"
210#if NSL > 0 || NPPP > 0
211		/* In the presence of SLIP or PPP, splimp > spltty. */
212		irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
213#endif
214	}
215
216	enable_irq(irq);
217	set_spl_masks();
218
219	return(0);
220}
221
222
223/*
224 * int irq_release(int irq, irqhandler_t *handler)
225 *
226 * Disable an IRQ and remove a handler for it.
227 */
228
229int
230irq_release(irq, handler)
231	int irq;
232	irqhandler_t *handler;
233{
234	int level;
235	int loop;
236	irqhandler_t *irqhand;
237	irqhandler_t **prehand;
238	extern char *_intrnames;
239
240	/*
241	 * IRQ_INSTRUCT indicates that we should get the irq number
242	 * from the irq structure
243	 */
244	if (irq == IRQ_INSTRUCT)
245		irq = handler->ih_num;
246
247	/* Make sure the irq number is valid */
248	if (irq < 0 || irq >= NIRQS)
249		return(-1);
250
251	/* Locate the handler */
252	irqhand = irqhandlers[irq];
253	prehand = &irqhandlers[irq];
254
255	while (irqhand && handler != irqhand) {
256		prehand = &irqhand;
257		irqhand = irqhand->ih_next;
258	}
259
260	/* Remove the handler if located */
261	if (irqhand)
262		*prehand = irqhand->ih_next;
263	else
264		return(-1);
265
266	/* Now the handler has been removed from the chain mark is as inactive */
267	irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
268
269	/* Make sure the head of the handler list is active */
270	if (irqhandlers[irq])
271		irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
272
273#ifdef IRQSTATS
274	/* Get the interrupt name from the head of the list */
275	if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
276		char *ptr = _intrnames + (irq * 14);
277		strcpy(ptr, "             ");
278		strncpy(ptr, irqhandlers[irq]->ih_name,
279		    min(strlen(irqhandlers[irq]->ih_name), 13));
280	} else {
281		char *ptr = _intrnames + (irq * 14);
282		sprintf(ptr, "irq %2d     ", irq);
283	}
284#endif	/* IRQSTATS */
285
286	/*
287	 * Update the irq masks.
288	 * If ih_level is out of range then don't bother to update
289	 * the masks.
290	 */
291	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
292		irqhandler_t *ptr;
293
294		/* Clean the bit from all the masks */
295		for (level = 0; level < IPL_LEVELS; ++level)
296			irqmasks[level] &= ~(1 << irq);
297
298		/*
299		 * Find the lowest interrupt priority on the irq chain.
300		 * Interrupt is allowable at priorities lower than this.
301		 */
302		ptr = irqhandlers[irq];
303		if (ptr) {
304			level = ptr->ih_level - 1;
305			while (ptr) {
306				if (ptr->ih_level - 1 < level)
307					level = ptr->ih_level - 1;
308				ptr = ptr->ih_next;
309			}
310			while (level >= 0) {
311				irqmasks[level] |= (1 << irq);
312				--level;
313			}
314		}
315	}
316
317	/*
318	 * Disable the appropriate mask bit if there are no handlers left for
319	 * this IRQ.
320	 */
321	if (irqhandlers[irq] == NULL)
322		disable_irq(irq);
323
324	set_spl_masks();
325
326	return(0);
327}
328
329
330void *
331intr_claim(irq, level, name, ih_func, ih_arg)
332	int irq;
333	int level;
334	const char *name;
335	int (*ih_func) __P((void *));
336	void *ih_arg;
337{
338	irqhandler_t *ih;
339
340	ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
341	if (!ih)
342		panic("intr_claim(): Cannot malloc handler memory");
343
344	ih->ih_level = level;
345	ih->ih_name = name;
346	ih->ih_func = ih_func;
347	ih->ih_arg = ih_arg;
348	ih->ih_flags = 0;
349
350	if (irq_claim(irq, ih) != 0)
351		return(NULL);
352	return(ih);
353}
354
355
356int
357intr_release(arg)
358	void *arg;
359{
360	irqhandler_t *ih = (irqhandler_t *)arg;
361
362	if (irq_release(ih->ih_num, ih) == 0) {
363		free(ih, M_DEVBUF);
364		return(0);
365	}
366	return(1);
367}
368
369
370/*
371 * void disable_irq(int irq)
372 *
373 * Disables a specific irq. The irq is removed from the master irq mask
374 */
375
376void
377disable_irq(irq)
378	int irq;
379{
380	register int oldirqstate;
381
382	oldirqstate = disable_interrupts(I32_bit);
383	current_mask &= ~(1 << irq);
384	irq_setmasks();
385	restore_interrupts(oldirqstate);
386}
387
388
389/*
390 * void enable_irq(int irq)
391 *
392 * Enables a specific irq. The irq is added to the master irq mask
393 * This routine should be used with caution. A handler should already
394 * be installed.
395 */
396
397void
398enable_irq(irq)
399	int irq;
400{
401	register u_int oldirqstate;
402
403	oldirqstate = disable_interrupts(I32_bit);
404	current_mask |= (1 << irq);
405	irq_setmasks();
406	restore_interrupts(oldirqstate);
407}
408
409
410/*
411 * void stray_irqhandler(u_int mask)
412 *
413 * Handler for stray interrupts. This gets called if a handler cannot be
414 * found for an interrupt.
415 */
416
417void	stray_irqhandler(u_int);	/* called from assembly */
418
419void
420stray_irqhandler(mask)
421	u_int mask;
422{
423	static u_int stray_irqs = 0;
424
425	if (++stray_irqs <= 8)
426		log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
427		    stray_irqs >= 8 ? ": stopped logging" : "");
428}
429