ofw_irqhandler.c revision 1.8
1/*	$NetBSD: ofw_irqhandler.c,v 1.8 2007/02/18 07:48:20 matt Exp $	*/
2
3/*
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by Mark Brinicombe
21 *	for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 *    endorse or promote products derived from this software without specific
24 *    prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 *	from: irqhandler.c
38 *
39 * IRQ/FIQ initialisation, claim, release and handler routines
40 *
41 * Created      : 30/09/94
42 */
43
44#include <sys/cdefs.h>
45__KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.8 2007/02/18 07:48:20 matt Exp $");
46
47#include "opt_irqstats.h"
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/syslog.h>
52#include <sys/malloc.h>
53
54#include <uvm/uvm_extern.h>
55
56#include <machine/intr.h>
57#include <machine/cpu.h>
58
59irqhandler_t *irqhandlers[NIRQS];
60
61int current_intr_depth;
62u_int current_mask;
63u_int actual_mask;
64u_int disabled_mask;
65u_int spl_mask;
66u_int irqmasks[IPL_LEVELS];
67extern u_int intrcnt[];
68
69extern char *_intrnames;
70
71/* Prototypes */
72
73int podule_irqhandler		__P((void));
74extern void set_spl_masks	__P((void));
75
76/*
77 * void irq_init(void)
78 *
79 * Initialise the IRQ/FIQ sub system
80 */
81
82void
83irq_init()
84{
85	int loop;
86
87	/* Clear all the IRQ handlers and the irq block masks */
88	for (loop = 0; loop < NIRQS; ++loop) {
89		irqhandlers[loop] = NULL;
90	}
91
92	/*
93	 * Setup the irqmasks for the different Interrupt Priority Levels
94	 * We will start with no bits set and these will be updated as handlers
95	 * are installed at different IPL's.
96	 */
97	for (loop = 0; loop < IPL_LEVELS; ++loop)
98		irqmasks[loop] = 0;
99
100	current_intr_depth = 0;
101	current_mask = 0x00000000;
102	disabled_mask = 0x00000000;
103	actual_mask = 0x00000000;
104	spl_mask = 0x00000000;
105	softintr_init();
106
107	set_spl_masks();
108
109	/* Enable IRQ's and FIQ's */
110	enable_interrupts(I32_bit | F32_bit);
111}
112
113
114/*
115 * int irq_claim(int irq, irqhandler_t *handler)
116 *
117 * Enable an IRQ and install a handler for it.
118 */
119
120int
121irq_claim(irq, handler)
122	int irq;
123	irqhandler_t *handler;
124{
125	int level;
126	int loop;
127
128#ifdef DIAGNOSTIC
129	/* Sanity check */
130	if (handler == NULL)
131		panic("NULL interrupt handler");
132	if (handler->ih_func == NULL)
133		panic("Interrupt handler does not have a function");
134#endif	/* DIAGNOSTIC */
135
136	/*
137	 * IRQ_INSTRUCT indicates that we should get the irq number
138	 * from the irq structure
139	 */
140	if (irq == IRQ_INSTRUCT)
141		irq = handler->ih_num;
142
143	/* Make sure the irq number is valid */
144	if (irq < 0 || irq >= NIRQS)
145		return(-1);
146
147	/* Make sure the level is valid */
148	if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
149    	        return(-1);
150
151	/* Attach handler at top of chain */
152	handler->ih_next = irqhandlers[irq];
153	irqhandlers[irq] = handler;
154
155	/*
156	 * Reset the flags for this handler.
157	 * As the handler is now in the chain mark it as active.
158	 */
159	handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
160
161	/*
162	 * Record the interrupt number for accounting.
163	 * Done here as the accounting number may not be the same as the
164	 * IRQ number though for the moment they are
165	 */
166	handler->ih_num = irq;
167
168#ifdef IRQSTATS
169	/* Get the interrupt name from the head of the list */
170	if (handler->ih_name) {
171		char *ptr = _intrnames + (irq * 14);
172		strcpy(ptr, "             ");
173		strncpy(ptr, handler->ih_name,
174		    min(strlen(handler->ih_name), 13));
175	} else {
176		char *ptr = _intrnames + (irq * 14);
177		sprintf(ptr, "irq %2d     ", irq);
178	}
179#endif	/* IRQSTATS */
180
181	/*
182	 * Update the irq masks.
183	 * Find the lowest interrupt priority on the irq chain.
184	 * Interrupt is allowable at priorities lower than this.
185	 * If ih_level is out of range then don't bother to update
186	 * the masks.
187	 */
188	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
189		irqhandler_t *ptr;
190
191		/*
192		 * Find the lowest interrupt priority on the irq chain.
193		 * Interrupt is allowable at priorities lower than this.
194		 */
195		ptr = irqhandlers[irq];
196		if (ptr) {
197			level = ptr->ih_level - 1;
198			while (ptr) {
199				if (ptr->ih_level - 1 < level)
200					level = ptr->ih_level - 1;
201				ptr = ptr->ih_next;
202			}
203			while (level >= 0) {
204				irqmasks[level] |= (1 << irq);
205				--level;
206			}
207		}
208
209#include "sl.h"
210#include "ppp.h"
211#if NSL > 0 || NPPP > 0
212		/* In the presence of SLIP or PPP, splimp > spltty. */
213		irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
214#endif
215	}
216
217	enable_irq(irq);
218	set_spl_masks();
219
220	return(0);
221}
222
223
224/*
225 * int irq_release(int irq, irqhandler_t *handler)
226 *
227 * Disable an IRQ and remove a handler for it.
228 */
229
230int
231irq_release(irq, handler)
232	int irq;
233	irqhandler_t *handler;
234{
235	int level;
236	int loop;
237	irqhandler_t *irqhand;
238	irqhandler_t **prehand;
239	extern char *_intrnames;
240
241	/*
242	 * IRQ_INSTRUCT indicates that we should get the irq number
243	 * from the irq structure
244	 */
245	if (irq == IRQ_INSTRUCT)
246		irq = handler->ih_num;
247
248	/* Make sure the irq number is valid */
249	if (irq < 0 || irq >= NIRQS)
250		return(-1);
251
252	/* Locate the handler */
253	irqhand = irqhandlers[irq];
254	prehand = &irqhandlers[irq];
255
256	while (irqhand && handler != irqhand) {
257		prehand = &irqhand;
258		irqhand = irqhand->ih_next;
259	}
260
261	/* Remove the handler if located */
262	if (irqhand)
263		*prehand = irqhand->ih_next;
264	else
265		return(-1);
266
267	/* Now the handler has been removed from the chain mark is as inactive */
268	irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
269
270	/* Make sure the head of the handler list is active */
271	if (irqhandlers[irq])
272		irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
273
274#ifdef IRQSTATS
275	/* Get the interrupt name from the head of the list */
276	if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
277		char *ptr = _intrnames + (irq * 14);
278		strcpy(ptr, "             ");
279		strncpy(ptr, irqhandlers[irq]->ih_name,
280		    min(strlen(irqhandlers[irq]->ih_name), 13));
281	} else {
282		char *ptr = _intrnames + (irq * 14);
283		sprintf(ptr, "irq %2d     ", irq);
284	}
285#endif	/* IRQSTATS */
286
287	/*
288	 * Update the irq masks.
289	 * If ih_level is out of range then don't bother to update
290	 * the masks.
291	 */
292	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
293		irqhandler_t *ptr;
294
295		/* Clean the bit from all the masks */
296		for (level = 0; level < IPL_LEVELS; ++level)
297			irqmasks[level] &= ~(1 << irq);
298
299		/*
300		 * Find the lowest interrupt priority on the irq chain.
301		 * Interrupt is allowable at priorities lower than this.
302		 */
303		ptr = irqhandlers[irq];
304		if (ptr) {
305			level = ptr->ih_level - 1;
306			while (ptr) {
307				if (ptr->ih_level - 1 < level)
308					level = ptr->ih_level - 1;
309				ptr = ptr->ih_next;
310			}
311			while (level >= 0) {
312				irqmasks[level] |= (1 << irq);
313				--level;
314			}
315		}
316	}
317
318	/*
319	 * Disable the appropriate mask bit if there are no handlers left for
320	 * this IRQ.
321	 */
322	if (irqhandlers[irq] == NULL)
323		disable_irq(irq);
324
325	set_spl_masks();
326
327	return(0);
328}
329
330
331void *
332intr_claim(irq, level, name, ih_func, ih_arg)
333	int irq;
334	int level;
335	const char *name;
336	int (*ih_func) __P((void *));
337	void *ih_arg;
338{
339	irqhandler_t *ih;
340
341	ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
342	if (!ih)
343		panic("intr_claim(): Cannot malloc handler memory");
344
345	ih->ih_level = level;
346	ih->ih_name = name;
347	ih->ih_func = ih_func;
348	ih->ih_arg = ih_arg;
349	ih->ih_flags = 0;
350
351	if (irq_claim(irq, ih) != 0)
352		return(NULL);
353	return(ih);
354}
355
356
357int
358intr_release(arg)
359	void *arg;
360{
361	irqhandler_t *ih = (irqhandler_t *)arg;
362
363	if (irq_release(ih->ih_num, ih) == 0) {
364		free(ih, M_DEVBUF);
365		return(0);
366	}
367	return(1);
368}
369
370
371/*
372 * void disable_irq(int irq)
373 *
374 * Disables a specific irq. The irq is removed from the master irq mask
375 */
376
377void
378disable_irq(irq)
379	int irq;
380{
381	register int oldirqstate;
382
383	oldirqstate = disable_interrupts(I32_bit);
384	current_mask &= ~(1 << irq);
385	irq_setmasks();
386	restore_interrupts(oldirqstate);
387}
388
389
390/*
391 * void enable_irq(int irq)
392 *
393 * Enables a specific irq. The irq is added to the master irq mask
394 * This routine should be used with caution. A handler should already
395 * be installed.
396 */
397
398void
399enable_irq(irq)
400	int irq;
401{
402	register u_int oldirqstate;
403
404	oldirqstate = disable_interrupts(I32_bit);
405	current_mask |= (1 << irq);
406	irq_setmasks();
407	restore_interrupts(oldirqstate);
408}
409
410
411/*
412 * void stray_irqhandler(u_int mask)
413 *
414 * Handler for stray interrupts. This gets called if a handler cannot be
415 * found for an interrupt.
416 */
417
418void	stray_irqhandler(u_int);	/* called from assembly */
419
420void
421stray_irqhandler(mask)
422	u_int mask;
423{
424	static u_int stray_irqs = 0;
425
426	if (++stray_irqs <= 8)
427		log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
428		    stray_irqs >= 8 ? ": stopped logging" : "");
429}
430