1/* $NetBSD: imx8mq_usbphy.c,v 1.5 2021/01/27 03:10:20 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 2020 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30 31__KERNEL_RCSID(0, "$NetBSD: imx8mq_usbphy.c,v 1.5 2021/01/27 03:10:20 thorpej Exp $"); 32 33#include <sys/param.h> 34#include <sys/bus.h> 35#include <sys/device.h> 36#include <sys/intr.h> 37#include <sys/systm.h> 38#include <sys/time.h> 39 40#include <dev/fdt/fdtvar.h> 41 42#define PHY_CTL0_ADDR 0x00 43#define REF_SSP_EN __BIT(2) 44 45#define PHY_CTL1_ADDR 0x04 46#define PHY_VDATDATENB0 __BIT(20) 47#define PHY_VDATSRCENB0 __BIT(19) 48#define PHY_ATERESET __BIT(3) 49#define PHY_COMMONONN __BIT(1) 50#define PHY_RESET __BIT(0) 51 52#define PHY_CTL2_ADDR 0x08 53#define PHY_TXENABLEN0 __BIT(8) 54 55static int imx8mq_usbphy_match(device_t, cfdata_t, void *); 56static void imx8mq_usbphy_attach(device_t, device_t, void *); 57 58static const struct device_compatible_entry compat_data[] = { 59 { .compat = "fsl,imx8mq-usb-phy" }, 60 DEVICE_COMPAT_EOL 61}; 62 63struct imx8mq_usbphy_softc { 64 device_t sc_dev; 65 bus_space_tag_t sc_bst; 66 bus_space_handle_t sc_bsh; 67 int sc_phandle; 68}; 69 70#define PHY_READ(sc, reg) \ 71 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 72#define PHY_WRITE(sc, reg, val) \ 73 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 74 75CFATTACH_DECL_NEW(imx8mqusbphy, sizeof(struct imx8mq_usbphy_softc), 76 imx8mq_usbphy_match, imx8mq_usbphy_attach, NULL, NULL); 77 78static void * 79imx8mq_usbphy_acquire(device_t dev, const void *data, size_t len) 80{ 81 if (len != 0) 82 return NULL; 83 84 return (void *)(uintptr_t)1; 85} 86 87static void 88imx8mq_usbphy_release(device_t dev, void *priv) 89{ 90} 91 92static int 93imx8mq_usbphy_enable(device_t dev, void *priv, bool enable) 94{ 95 struct imx8mq_usbphy_softc * const sc = device_private(dev); 96 struct fdtbus_regulator *reg; 97 uint32_t val; 98 int error; 99 100 if (enable) { 101 if (of_hasprop(sc->sc_phandle, "vbus-supply")) { 102 reg = fdtbus_regulator_acquire(sc->sc_phandle, "vbus-supply"); 103 if (reg != NULL) { 104 error = fdtbus_regulator_enable(reg); 105 if (error != 0) 106 device_printf(dev, "WARNING: couldn't enable vbus-supply: %d\n", error); 107 } else { 108 device_printf(dev, "WARNING: couldn't acquire vbus-supply\n"); 109 } 110 } 111 112 val = PHY_READ(sc, PHY_CTL1_ADDR); 113 val &= ~PHY_VDATDATENB0; 114 val &= ~PHY_VDATSRCENB0; 115 val &= ~PHY_COMMONONN; 116 val |= PHY_RESET; 117 val |= PHY_ATERESET; 118 PHY_WRITE(sc, PHY_CTL1_ADDR, val); 119 120 val = PHY_READ(sc, PHY_CTL0_ADDR); 121 val |= REF_SSP_EN; 122 PHY_WRITE(sc, PHY_CTL0_ADDR, val); 123 124 val = PHY_READ(sc, PHY_CTL2_ADDR); 125 val |= PHY_TXENABLEN0; 126 PHY_WRITE(sc, PHY_CTL2_ADDR, val); 127 128 val = PHY_READ(sc, PHY_CTL1_ADDR); 129 val &= ~PHY_RESET; 130 val &= ~PHY_ATERESET; 131 PHY_WRITE(sc, PHY_CTL1_ADDR, val); 132 } 133 134 return 0; 135} 136 137const struct fdtbus_phy_controller_func imx8mq_usbphy_funcs = { 138 .acquire = imx8mq_usbphy_acquire, 139 .release = imx8mq_usbphy_release, 140 .enable = imx8mq_usbphy_enable, 141}; 142 143static int 144imx8mq_usbphy_match(device_t parent, cfdata_t cf, void *aux) 145{ 146 struct fdt_attach_args * const faa = aux; 147 148 return of_compatible_match(faa->faa_phandle, compat_data); 149} 150 151static void 152imx8mq_usbphy_attach(device_t parent, device_t self, void *aux) 153{ 154 struct imx8mq_usbphy_softc * const sc = device_private(self); 155 struct fdt_attach_args * const faa = aux; 156 const int phandle = faa->faa_phandle; 157 bus_addr_t addr; 158 bus_size_t size; 159 160 sc->sc_dev = self; 161 sc->sc_bst = faa->faa_bst; 162 sc->sc_phandle = phandle; 163 164 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 165 aprint_error(": couldn't get registers\n"); 166 return; 167 } 168 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 169 aprint_error(": couldn't map registers\n"); 170 return; 171 } 172 173 /* Enable clocks */ 174 fdtbus_clock_assign(phandle); 175 if (fdtbus_clock_enable(phandle, "phy", true) != 0) { 176 aprint_error(": couldn't enable phy clock\n"); 177 return; 178 } 179 180 aprint_naive("\n"); 181 aprint_normal(": USB PHY\n"); 182 183 fdtbus_register_phy_controller(self, phandle, &imx8mq_usbphy_funcs); 184} 185