1/*	$NetBSD: imx6var.h,v 1.2 2024/02/07 04:20:27 msaitoh Exp $	*/
2
3/*
4 * Copyright (c) 2014 Ryo Shimizu
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef _ARM_NXP_IMX6VAR_H
30#define _ARM_NXP_IMX6VAR_H
31
32#include <sys/cdefs.h>
33
34struct axi_attach_args {
35	const char *aa_name;
36	bus_space_tag_t aa_iot;
37	bus_dma_tag_t aa_dmat;
38	bus_addr_t aa_addr;
39	bus_size_t aa_size;
40	int aa_irq;
41	int aa_irqbase;
42};
43
44extern struct bus_space armv7_generic_bs_tag;
45extern struct arm32_bus_dma_tag arm_generic_dma_tag;
46extern bus_space_tag_t imx6_armcore_bst;
47extern bus_space_handle_t imx6_armcore_bsh;
48extern bus_space_tag_t imx6_ioreg_bst;
49extern bus_space_handle_t imx6_ioreg_bsh;
50
51/* iomux utility functions in imx6_iomux.c */
52struct iomux_conf {
53	uint32_t pin;	/* ((MUXADDR<<16)|PADADDR) */
54#define IOMUX_CONF_EOT	((uint32_t)(-1))
55	uint32_t mux;
56	uint32_t pad;
57};
58
59uint32_t iomux_read(uint32_t);
60void iomux_write(uint32_t, uint32_t);
61void iomux_set_function(u_int, u_int);
62void iomux_set_pad(u_int, u_int);
63void iomux_set_input(u_int, u_int);
64void iomux_mux_config(const struct iomux_conf *);
65
66/* imx6_board.c */
67void imx6_bootstrap(vaddr_t);
68psize_t imx6_memprobe(void);
69uint32_t imx6_armrootclk(void);
70void imx6_reset(void) __dead;
71void imx6_device_register(device_t, void *);
72void imx6_set_gpio(device_t, const char *, int32_t *, int32_t *, u_int);
73uint32_t imx6_chip_id(void);
74#define CHIPID_MINOR_MASK		0x000000ff
75#define CHIPID_MAJOR_MASK		0x00ffff00
76#define CHIPID_MAJOR_IMX6SL		0x00600000
77#define CHIPID_MAJOR_IMX6DL		0x00610000
78#define CHIPID_MAJOR_IMX6SOLO		0x00620000
79#define CHIPID_MAJOR_IMX6Q		0x00630000
80#define CHIPID_MAJOR_IMX6UL		0x00640000
81#define IMX6_CHIPID_MAJOR(v)		((v) & CHIPID_MAJOR_MASK)
82#define IMX6_CHIPID_MINOR(v)		((v) & CHIPID_MINOR_MASK)
83
84#endif /* _ARM_NXP_IMX6VAR_H */
85