tegra_var.h revision 1.10 
1/* $NetBSD: tegra_var.h,v 1.10 2015/05/09 11:17:59 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef _ARM_TEGRA_VAR_H
30#define _ARM_TEGRA_VAR_H
31
32#include <sys/types.h>
33#include <sys/bus.h>
34#include <sys/gpio.h>
35
36#include "opt_tegra.h"
37
38struct tegra_locators {
39	const char *loc_name;
40	bus_addr_t loc_offset;
41	bus_size_t loc_size;
42	int loc_port;
43	int loc_intr;
44#define TEGRAIO_INTR_DEFAULT	0
45};
46
47struct tegraio_attach_args {
48	struct tegra_locators tio_loc;
49	bus_space_tag_t tio_bst;
50	bus_space_tag_t tio_a4x_bst;
51	bus_space_handle_t tio_bsh;
52	bus_dma_tag_t tio_dmat;
53	bus_dma_tag_t tio_coherent_dmat;
54};
55
56extern struct bus_space armv7_generic_bs_tag;
57extern struct bus_space armv7_generic_a4x_bs_tag;
58extern bus_space_handle_t tegra_host1x_bsh;
59extern bus_space_handle_t tegra_ppsb_bsh;
60extern bus_space_handle_t tegra_apb_bsh;
61extern bus_space_handle_t tegra_ahb_a2_bsh;
62extern struct arm32_bus_dma_tag tegra_dma_tag;
63extern struct arm32_bus_dma_tag tegra_coherent_dma_tag;
64
65#define CHIP_ID_TEGRA20		0x20
66#define CHIP_ID_TEGRA30		0x30
67#define CHIP_ID_TEGRA114	0x35
68#define CHIP_ID_TEGRA124	0x40
69#define CHIP_ID_TEGRA132	0x13
70
71u_int	tegra_chip_id(void);
72const char *tegra_chip_name(void);
73void	tegra_bootstrap(void);
74void	tegra_dma_bootstrap(psize_t);
75
76u_int	tegra_car_osc_rate(void);
77u_int	tegra_car_pllc_rate(void);
78u_int	tegra_car_pllx_rate(void);
79u_int	tegra_car_pllu_rate(void);
80u_int	tegra_car_pllp0_rate(void);
81u_int	tegra_car_uart_rate(u_int);
82u_int	tegra_car_periph_sdmmc_rate(u_int);
83int	tegra_car_periph_sdmmc_set_div(u_int, u_int);
84
85struct tegra_gpio_pin;
86struct tegra_gpio_pin *tegra_gpio_acquire(const char *, u_int);
87void	tegra_gpio_release(struct tegra_gpio_pin *);
88int	tegra_gpio_read(struct tegra_gpio_pin *);
89void	tegra_gpio_write(struct tegra_gpio_pin *, int);
90
91struct tegra_mpio_padctlgrp {
92	int	preemp;
93	int	hsm;
94	int	schmt;
95	int	drv_type;
96	int	drvdn;
97	int	drvup;
98	int	slwr;
99	int	slwf;
100};
101void	tegra_mpio_padctlgrp_read(u_int, struct tegra_mpio_padctlgrp *);
102void	tegra_mpio_padctlgrp_write(u_int, const struct tegra_mpio_padctlgrp *);
103
104void	tegra_mpio_pinmux_set_config(u_int, int, const char *);
105void	tegra_mpio_pinmux_set_io_reset(u_int, bool);
106void	tegra_mpio_pinmux_set_rcv_sel(u_int, bool);
107void	tegra_mpio_pinmux_get_config(u_int, int *, const char **);
108const char *tegra_mpio_pinmux_get_pm(u_int);
109bool	tegra_mpio_pinmux_get_io_reset(u_int);
110bool	tegra_mpio_pinmux_get_rcv_sel(u_int);
111
112void	tegra_pmc_reset(void);
113void	tegra_pmc_power(u_int, bool);
114
115psize_t	tegra_mc_memsize(void);
116
117#if defined(SOC_TEGRA124)
118void	tegra124_mpinit(void);
119#endif
120
121static void inline
122tegra_reg_set_clear(bus_space_tag_t bst, bus_space_handle_t bsh,
123    bus_size_t o, uint32_t set_mask, uint32_t clr_mask)
124{
125	const uint32_t old = bus_space_read_4(bst, bsh, o);
126	const uint32_t new = set_mask | (old & ~clr_mask);
127	if (old != new) {
128		bus_space_write_4(bst, bsh, o, new);
129	}
130}
131
132#endif /* _ARM_TEGRA_VAR_H */
133