ixp12x0_io.c revision 1.6 
1/*	$NetBSD: ixp12x0_io.c,v 1.6 2003/02/17 20:51:52 ichiro Exp $ */
2
3/*
4 * Copyright (c) 2002, 2003
5 *	Ichiro FUKUHARA <ichiro@ichiro.org>.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by Ichiro FUKUHARA.
19 * 4. The name of the company nor the name of the author may be used to
20 *    endorse or promote products derived from this software without specific
21 *    prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 */
35
36/*
37 * bus_space I/O functions for ixp12x0
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/queue.h>
43
44#include <uvm/uvm.h>
45
46#include <machine/bus.h>
47
48#include <arm/ixp12x0/ixp12x0reg.h>
49#include <arm/ixp12x0/ixp12x0var.h>
50
51/* Proto types for all the bus_space structure functions */
52bs_protos(ixp12x0);
53bs_protos(ixp12x0_io);
54bs_protos(ixp12x0_mem);
55bs_protos(generic);
56bs_protos(generic_armv4);
57bs_protos(bs_notimpl);
58
59struct bus_space ixp12x0_bs_tag = {
60	/* cookie */
61	(void *) 0,
62
63	/* mapping/unmapping */
64	NULL,
65	NULL,
66	ixp12x0_bs_subregion,
67
68	/* allocation/deallocation */
69	NULL,
70	NULL,
71
72	/* get kernel virtual address */
73	ixp12x0_bs_vaddr,
74
75	/* mmap bus space for userland */
76	ixp12x0_bs_mmap,
77
78	/* barrier */
79	ixp12x0_bs_barrier,
80
81	/* read (single) */
82	generic_bs_r_1,
83	generic_armv4_bs_r_2,
84	generic_bs_r_4,
85	bs_notimpl_bs_r_8,
86
87	/* read multiple */
88	generic_bs_rm_1,
89	generic_armv4_bs_rm_2,
90	generic_bs_rm_4,
91	bs_notimpl_bs_rm_8,
92
93	/* read region */
94	bs_notimpl_bs_rr_1,
95	generic_armv4_bs_rr_2,
96	generic_bs_rr_4,
97	bs_notimpl_bs_rr_8,
98
99	/* write (single) */
100	generic_bs_w_1,
101	generic_armv4_bs_w_2,
102	generic_bs_w_4,
103	bs_notimpl_bs_w_8,
104
105	/* write multiple */
106	generic_bs_wm_1,
107	generic_armv4_bs_wm_2,
108	generic_bs_wm_4,
109	bs_notimpl_bs_wm_8,
110
111	/* write region */
112	bs_notimpl_bs_wr_1,
113	generic_armv4_bs_wr_2,
114	generic_bs_wr_4,
115	bs_notimpl_bs_wr_8,
116
117	/* set multiple */
118	bs_notimpl_bs_sm_1,
119	bs_notimpl_bs_sm_2,
120	bs_notimpl_bs_sm_4,
121	bs_notimpl_bs_sm_8,
122
123	/* set region */
124	bs_notimpl_bs_sr_1,
125	generic_armv4_bs_sr_2,
126	generic_bs_sr_4,
127	bs_notimpl_bs_sr_8,
128
129	/* copy */
130	bs_notimpl_bs_c_1,
131	generic_armv4_bs_c_2,
132	bs_notimpl_bs_c_4,
133	bs_notimpl_bs_c_8,
134};
135
136void
137ixp12x0_bs_init(bs, cookie)
138	bus_space_tag_t bs;
139	void *cookie;
140{
141	*bs = ixp12x0_bs_tag;
142	bs->bs_cookie = cookie;
143}
144
145void
146ixp12x0_io_bs_init(bs, cookie)
147	bus_space_tag_t bs;
148	void *cookie;
149{
150	*bs = ixp12x0_bs_tag;
151	bs->bs_cookie = cookie;
152
153	bs->bs_map = ixp12x0_io_bs_map;
154	bs->bs_unmap = ixp12x0_io_bs_unmap;
155	bs->bs_alloc = ixp12x0_io_bs_alloc;
156	bs->bs_free = ixp12x0_io_bs_free;
157
158	bs->bs_vaddr = ixp12x0_io_bs_vaddr;
159}
160void
161ixp12x0_mem_bs_init(bs, cookie)
162	bus_space_tag_t bs;
163	void *cookie;
164{
165	*bs = ixp12x0_bs_tag;
166	bs->bs_cookie = cookie;
167
168	bs->bs_map = ixp12x0_mem_bs_map;
169	bs->bs_unmap = ixp12x0_mem_bs_unmap;
170	bs->bs_alloc = ixp12x0_mem_bs_alloc;
171	bs->bs_free = ixp12x0_mem_bs_free;
172
173	bs->bs_mmap = ixp12x0_mem_bs_mmap;
174}
175
176/* mem bus space functions */
177
178int
179ixp12x0_mem_bs_map(t, bpa, size, cacheable, bshp)
180	void *t;
181	bus_addr_t bpa;
182	bus_size_t size;
183	int cacheable;
184	bus_space_handle_t *bshp;
185{
186	paddr_t pa, endpa;
187	vaddr_t va;
188
189	if ((bpa + size) >= IXP12X0_PCI_MEM_VBASE + IXP12X0_PCI_MEM_SIZE)
190		return (EINVAL);
191	/*
192	 * PCI MEM space is mapped same address as real memory
193	 *  see. PCI_ADDR_EXT
194	 */
195	pa = trunc_page(bpa);
196	endpa = round_page(bpa + size);
197
198	/* Get some VM.  */
199	va = uvm_km_valloc(kernel_map, endpa - pa);
200	if (va == 0)
201		return(ENOMEM);
202
203	/* Store the bus space handle */
204	*bshp = va + (bpa & PAGE_MASK);
205
206	/* Now map the pages */
207	for(; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
208		pmap_enter(pmap_kernel(), va, pa,
209		    VM_PROT_READ | VM_PROT_WRITE,
210		    VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
211	}
212	pmap_update(pmap_kernel());
213
214	return(0);
215}
216
217void
218ixp12x0_mem_bs_unmap(t, bsh, size)
219	void *t;
220	bus_space_handle_t bsh;
221	bus_size_t size;
222{
223	vaddr_t startva, endva;
224
225	startva = trunc_page(bsh);
226	endva = round_page(bsh + size);
227
228	uvm_km_free(kernel_map, startva, endva - startva);
229}
230
231int
232ixp12x0_mem_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
233    bpap, bshp)
234	void *t;
235	bus_addr_t rstart, rend;
236	bus_size_t size, alignment, boundary;
237	int cacheable;
238	bus_addr_t *bpap;
239	bus_space_handle_t *bshp;
240{
241	panic("ixp12x0_mem_bs_alloc(): Help!");
242}
243
244void
245ixp12x0_mem_bs_free(t, bsh, size)
246	void *t;
247	bus_space_handle_t bsh;
248	bus_size_t size;
249{
250	panic("ixp12x0_mem_bs_free(): Help!");
251}
252
253paddr_t
254ixp12x0_mem_bs_mmap(t, addr, off, prot, flags)
255	void *t;
256	bus_addr_t addr;
257	off_t off;
258	int prot;
259	int flags;
260{
261	/* Not supported. */
262	return (-1);
263}
264
265/* I/O bus space functions */
266
267int
268ixp12x0_io_bs_map(t, bpa, size, cacheable, bshp)
269	void *t;
270	bus_addr_t bpa;
271	bus_size_t size;
272	int cacheable;
273	bus_space_handle_t *bshp;
274{
275	if ((bpa + size) >= IXP12X0_PCI_IO_SIZE)
276		return (EINVAL);
277
278	/*
279	 * PCI I/O space is mapped at virtual address of each evaluation board.
280	 * Translate the bus address(0x0) to the virtual address(0x54000000).
281	 */
282	*bshp = bpa + IXP12X0_PCI_IO_VBASE;
283
284	return(0);
285}
286
287void
288ixp12x0_io_bs_unmap(t, bsh, size)
289	void *t;
290	bus_space_handle_t bsh;
291	bus_size_t size;
292{
293	/*
294	 * Temporary implementation
295	 */
296}
297
298int
299ixp12x0_io_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
300    bpap, bshp)
301	void *t;
302	bus_addr_t rstart, rend;
303	bus_size_t size, alignment, boundary;
304	int cacheable;
305	bus_addr_t *bpap;
306	bus_space_handle_t *bshp;
307{
308	panic("ixp12x0_io_bs_alloc(): Help!");
309}
310
311void
312ixp12x0_io_bs_free(t, bsh, size)
313	void *t;
314	bus_space_handle_t bsh;
315	bus_size_t size;
316{
317	panic("ixp12x0_io_bs_free(): Help!");
318}
319
320void *
321ixp12x0_io_bs_vaddr(t, bsh)
322        void *t;
323        bus_space_handle_t bsh;
324{
325	/* Not supported. */
326	return (NULL);
327}
328
329
330/* Common routines */
331
332int
333ixp12x0_bs_subregion(t, bsh, offset, size, nbshp)
334	void *t;
335	bus_space_handle_t bsh;
336	bus_size_t offset, size;
337	bus_space_handle_t *nbshp;
338{
339
340	*nbshp = bsh + offset;
341	return (0);
342}
343
344void *
345ixp12x0_bs_vaddr(t, bsh)
346	void *t;
347	bus_space_handle_t bsh;
348{
349	return ((void *)bsh);
350}
351
352paddr_t
353ixp12x0_bs_mmap(t, addr, off, prot, flags)
354	void *t;
355	bus_addr_t addr;
356	off_t off;
357	int prot;
358	int flags;
359{
360	/* Not supported. */
361	return (-1);
362}
363
364void
365ixp12x0_bs_barrier(t, bsh, offset, len, flags)
366	void *t;
367	bus_space_handle_t bsh;
368	bus_size_t offset, len;
369	int flags;
370{
371/* NULL */
372}
373
374
375
376/* End of ixp12x0_io.c */
377