footbridge_io.c revision 1.14
1/* $NetBSD: footbridge_io.c,v 1.14 2007/10/17 19:53:40 garbled Exp $ */ 2 3/* 4 * Copyright (c) 1997 Causality Limited 5 * Copyright (c) 1997 Mark Brinicombe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37/* 38 * bus_space I/O functions for footbridge 39 */ 40 41#include <sys/cdefs.h> 42__KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.14 2007/10/17 19:53:40 garbled Exp $"); 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <machine/bus.h> 47#include <arm/footbridge/footbridge.h> 48#include <arm/footbridge/dc21285mem.h> 49#include <uvm/uvm_extern.h> 50 51/* Proto types for all the bus_space structure functions */ 52 53bs_protos(footbridge); 54bs_protos(generic); 55bs_protos(generic_armv4); 56bs_protos(bs_notimpl); 57bs_map_proto(footbridge_mem); 58bs_unmap_proto(footbridge_mem); 59bs_mmap_proto(footbridge_mem); 60 61/* Declare the footbridge bus space tag */ 62 63struct bus_space footbridge_bs_tag = { 64 /* cookie */ 65 (void *) 0, /* Base address */ 66 67 /* mapping/unmapping */ 68 footbridge_bs_map, 69 footbridge_bs_unmap, 70 footbridge_bs_subregion, 71 72 /* allocation/deallocation */ 73 footbridge_bs_alloc, 74 footbridge_bs_free, 75 76 /* get kernel virtual address */ 77 footbridge_bs_vaddr, 78 79 /* Mmap bus space for user */ 80 bs_notimpl_bs_mmap, 81 82 /* barrier */ 83 footbridge_bs_barrier, 84 85 /* read (single) */ 86 generic_bs_r_1, 87 generic_armv4_bs_r_2, 88 generic_bs_r_4, 89 bs_notimpl_bs_r_8, 90 91 /* read multiple */ 92 generic_bs_rm_1, 93 generic_armv4_bs_rm_2, 94 generic_bs_rm_4, 95 bs_notimpl_bs_rm_8, 96 97 /* read region */ 98 bs_notimpl_bs_rr_1, 99 generic_armv4_bs_rr_2, 100 generic_bs_rr_4, 101 bs_notimpl_bs_rr_8, 102 103 /* write (single) */ 104 generic_bs_w_1, 105 generic_armv4_bs_w_2, 106 generic_bs_w_4, 107 bs_notimpl_bs_w_8, 108 109 /* write multiple */ 110 generic_bs_wm_1, 111 generic_armv4_bs_wm_2, 112 generic_bs_wm_4, 113 bs_notimpl_bs_wm_8, 114 115 /* write region */ 116 bs_notimpl_bs_wr_1, 117 generic_armv4_bs_wr_2, 118 generic_bs_wr_4, 119 bs_notimpl_bs_wr_8, 120 121 /* set multiple */ 122 bs_notimpl_bs_sm_1, 123 bs_notimpl_bs_sm_2, 124 bs_notimpl_bs_sm_4, 125 bs_notimpl_bs_sm_8, 126 127 /* set region */ 128 bs_notimpl_bs_sr_1, 129 generic_armv4_bs_sr_2, 130 bs_notimpl_bs_sr_4, 131 bs_notimpl_bs_sr_8, 132 133 /* copy */ 134 bs_notimpl_bs_c_1, 135 generic_armv4_bs_c_2, 136 bs_notimpl_bs_c_4, 137 bs_notimpl_bs_c_8, 138}; 139 140void footbridge_create_io_bs_tag(t, cookie) 141 struct bus_space *t; 142 void *cookie; 143{ 144 *t = footbridge_bs_tag; 145 t->bs_cookie = cookie; 146} 147 148void footbridge_create_mem_bs_tag(t, cookie) 149 struct bus_space *t; 150 void *cookie; 151{ 152 *t = footbridge_bs_tag; 153 t->bs_map = footbridge_mem_bs_map; 154 t->bs_unmap = footbridge_mem_bs_unmap; 155 t->bs_mmap = footbridge_mem_bs_mmap; 156 t->bs_cookie = cookie; 157} 158 159/* bus space functions */ 160 161int 162footbridge_bs_map(t, bpa, size, cacheable, bshp) 163 void *t; 164 bus_addr_t bpa; 165 bus_size_t size; 166 int cacheable; 167 bus_space_handle_t *bshp; 168{ 169 /* 170 * The whole 64K of PCI space is always completely mapped during 171 * boot. 172 * 173 * Eventually this function will do the mapping check overlapping / 174 * multiple mappings. 175 */ 176 177 /* The cookie is the base address for the I/O area */ 178 *bshp = bpa + (bus_addr_t)t; 179 return(0); 180} 181 182int 183footbridge_mem_bs_map(t, bpa, size, flags, bshp) 184 void *t; 185 bus_addr_t bpa; 186 bus_size_t size; 187 int flags; 188 bus_space_handle_t *bshp; 189{ 190 bus_addr_t startpa, endpa, pa; 191 vaddr_t va; 192 193 /* Round the allocation to page boundries */ 194 startpa = trunc_page(bpa); 195 endpa = round_page(bpa + size); 196 197 /* 198 * Check for mappings below 1MB as we have this space already 199 * mapped. In practice it is only the VGA hole that takes 200 * advantage of this. 201 */ 202 if (endpa < DC21285_PCI_ISA_MEM_VSIZE) { 203 /* Store the bus space handle */ 204 *bshp = DC21285_PCI_ISA_MEM_VBASE + bpa; 205 return 0; 206 } 207 208 /* 209 * Eventually this function will do the mapping check for overlapping / 210 * multiple mappings 211 */ 212 213 va = uvm_km_alloc(kernel_map, endpa - startpa, 0, 214 UVM_KMF_VAONLY | UVM_KMF_NOWAIT); 215 if (va == 0) 216 return ENOMEM; 217 218 /* Store the bus space handle */ 219 *bshp = va + (bpa & PGOFSET); 220 221 /* Now map the pages */ 222 /* The cookie is the physical base address for the I/O area */ 223 for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE) 224 { 225 pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE, 226 VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED); 227 if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) { 228 pt_entry_t *pte; 229 pte = vtopte(va); 230 *pte &= ~L2_S_CACHE_MASK; 231 PTE_SYNC(pte); 232 } 233 } 234 pmap_update(pmap_kernel()); 235 236/* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE) 237 panic("footbridge_bs_map: Address out of range (%08lx)", bpa); 238*/ 239 return(0); 240} 241 242int 243footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable, 244 bpap, bshp) 245 void *t; 246 bus_addr_t rstart, rend; 247 bus_size_t size, alignment, boundary; 248 int cacheable; 249 bus_addr_t *bpap; 250 bus_space_handle_t *bshp; 251{ 252 panic("footbridge_alloc(): Help!"); 253} 254 255 256void 257footbridge_bs_unmap(t, bsh, size) 258 void *t; 259 bus_space_handle_t bsh; 260 bus_size_t size; 261{ 262 /* 263 * Temporary implementation 264 */ 265} 266 267void 268footbridge_mem_bs_unmap(t, bsh, size) 269 void *t; 270 bus_space_handle_t bsh; 271 bus_size_t size; 272{ 273 vaddr_t startva, endva; 274 275 /* 276 * Check for mappings below 1MB as we have this space permenantly 277 * mapped. In practice it is only the VGA hole that takes 278 * advantage of this. 279 */ 280 if (bsh >= DC21285_PCI_ISA_MEM_VBASE 281 && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) { 282 return; 283 } 284 285 startva = trunc_page(bsh); 286 endva = round_page(bsh + size); 287 288 pmap_remove(pmap_kernel(), startva, endva); 289 pmap_update(pmap_kernel()); 290 uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY); 291} 292 293void 294footbridge_bs_free(t, bsh, size) 295 void *t; 296 bus_space_handle_t bsh; 297 bus_size_t size; 298{ 299 300 panic("footbridge_free(): Help!"); 301 /* footbridge_bs_unmap() does all that we need to do. */ 302/* footbridge_bs_unmap(t, bsh, size);*/ 303} 304 305int 306footbridge_bs_subregion(t, bsh, offset, size, nbshp) 307 void *t; 308 bus_space_handle_t bsh; 309 bus_size_t offset, size; 310 bus_space_handle_t *nbshp; 311{ 312 313 *nbshp = bsh + (offset << ((int)t)); 314 return (0); 315} 316 317void * 318footbridge_bs_vaddr(t, bsh) 319 void *t; 320 bus_space_handle_t bsh; 321{ 322 323 return ((void *)bsh); 324} 325 326void 327footbridge_bs_barrier(t, bsh, offset, len, flags) 328 void *t; 329 bus_space_handle_t bsh; 330 bus_size_t offset, len; 331 int flags; 332{ 333} 334 335 336paddr_t 337footbridge_mem_bs_mmap(void *t, bus_addr_t addr, off_t offset, 338 int prot, int flags) 339{ 340 paddr_t pa; 341 342 if (addr >= DC21285_PCI_MEM_SIZE 343 || offset < 0 344 || offset >= DC21285_PCI_MEM_SIZE 345 || addr >= DC21285_PCI_MEM_SIZE - offset) 346 return -1; 347 348 pa = DC21285_PCI_MEM_BASE + addr + offset; 349 350 return arm_ptob(pa); 351} 352